## @file # Platform Package Flash Description File # #****************************************************************************** #* Copyright (c) 2014 - 2021, Insyde Software Corp. All Rights Reserved. #* #* You may not reproduce, distribute, publish, display, perform, modify, adapt, #* transmit, broadcast, present, recite, release, license or otherwise exploit #* any part of this publication in any form, by any means, without the prior #* written permission of Insyde Software Corporation. #* #****************************************************************************** ## #_Start_L05_FEATURE_ !import InsydeL05ModulePkg/PackageBase.fdf #_End_L05_FEATURE_ !import BaseTools/Conf/PackageBase.fdf !import MdeModulePkg/Package.fdf !import PcAtChipsetPkg/Package.fdf !import UnitTestFrameworkPkg/Package.fdf !import UefiCpuPkg/Package.fdf !import PerformancePkg/Package.fdf !import SecurityPkg/Package.fdf !import FatPkg/Package.fdf !import ShellBinPkg/Package.fdf !import ShellPkg/Package.fdf !import InsydeOemServicesPkg/Package.fdf !import InsydeModulePkg/Package.fdf !import InsydeSetupPkg/Package.fdf !import InsydeNetworkPkg/Package.fdf !import InsydeFlashDevicePkg/Package.fdf !import InsydeCrPkg/Package.fdf !import SioDummyPkg/Package.fdf !import IntelSiliconPkg/Package.fdf !import ClientOneSiliconPkg/Package.fdf !import MinPlatformPkg/Package.fdf !import AlderLakePlatSamplePkg/Package.fdf !import AlderLakeChipsetPkg/Package.fdf !import AlderLakeBoardPkg/Package.fdf #_Start_L05_FEATURE_ !import InsydeL05ModulePkg/Package.fdf !import InsydeL05PlatformPkg/Package.fdf #_End_L05_FEATURE_ #[-start-210513-KEBIN00001-modify]# !import LfcPkg/Package.fdf #[-end-210513-KEBIN00001-modify]# #[-start-190612-IB16990049-add]# [Defines] !if $(FSP_WRAPPER_SUPPORT) == YES # # |-------- RKLS RVP16M BIOS layout (Release Build) ------------| # |-------------------------------------------------------------| 0x01000000 # | FV_RECOVERY0 (0x0002D000) | # |-------------------------------------------------------------| 0x00FD3000 # | FLASH_DEVICE_MAP (0x00001000) | # |-------------------------------------------------------------| 0x00FD2000 # | Fsp_Rebased_T (0x00010000) | # |-------------------------------------------------------------| 0x00FC2000 # | Fsp_Rebased_M (0x00150000) | # |-------------------------------------------------------------| 0x00E72000 # | Fsp_Rebased_S (0x000AF000) | # |-------------------------------------------------------------| 0x00DC3000 # | FV_RECOVERY (0x00086000) | # |-------------------------------------------------------------| 0x00D3D000 # | FV_RECOVERY2 (0x0003D000) | # |-------------------------------------------------------------| 0x00D00000 # | FV_MICROCODE (0x00080000) | # |-------------------------------------------------------------| 0x00C80000 # | FW_BINARIES (0x00080000) | # |-------------------------------------------------------------| 0x00C00000 # | FW_RESILIENCY_RESERVED | # The Resiliency FV space will dynamic release when # | (For Top Swap Space 0x00400000) | # Build Target is "DEBUG" and ChasmFalls is disable. # |-------------------------------------------------------------| 0x00800000 # | INSYDE_BOOT_LOGO (0x00004000) | # |-------------------------------------------------------------| 0x007FC000 # | | # | FVMAIN (FVMAIN SIZE - BOOT LOGO = 0x00520000) | # | | # |-------------------------------------------------------------| 0x003DC000 # | FV_SECURITY (0x00070000) | # |-------------------------------------------------------------| 0x0036C000 # | FV_OPTIONAL (0x00280000) | # |-------------------------------------------------------------| 0x000EC000 # | VARIABLE_DEFAULTS (0x00030000) | # |-------------------------------------------------------------| 0x000BC000 # | NV_COMMON_STORE_SUBREGION_NV_MSDM_DATA (0x00010000) | # |-------------------------------------------------------------| 0x000AC000 # | NV_COMMON_STORE_SUBREGION_OEM_DMI_STORE (0x00001000) | # |-------------------------------------------------------------| 0x000AB000 # | NV_COMMON_STORE_SUBREGION_NV_BVDT (0x00001000) | # |-------------------------------------------------------------| 0x000AA000 # | NV_FACTORY_COPY (0x00020000) | # |-------------------------------------------------------------| 0x0008A000 # | NV_FTW_SPARE (0x00045000) | # |-------------------------------------------------------------| 0x00045000 # | NV_FTW_WORKING (0x00002000) | # |-------------------------------------------------------------| 0x00043000 # | NV_VARIABLE_STORE (0x00043000) | # |-------------------------------------------------------------| 0 # # WARNING: # If you change FLASH_BASE, you also need to adjust # gChipsetPkgTokenSpaceGuid.PcdTopOfCar # #[-end-190612-IB16990049-add]# # Extended BIOS ROM/Memory Map # Memory Map ROM Map # |-------------------------------------------------------------| 4G |-------------------------------------------------------------| 0xFFFFFFFF # | | | | # | | | | # | BIOS ROM 16 MB | | BIOS ROM 16 MB | # | | | | # | | | | # |-------------------------------------------------------------| 0xFF000000 |=============================================================| 0xFF000000 ---| # | | | FvExtendedPostMemory | | # | | |-------------------------------------------------------------| 0xFEF80000 | Extended In Use 1MB # | | | FvExtendedAdvanced | | # | | |-------------------------------------------------------------| 0xFEF00000 ---| # | | | | | # | | | | | Empty 31 MB # | | | | | # |-------------------------------------------------------------| 0xFD000000 |=============================================================|---------------| # | | # |-------------------------------------------------------------| # | | # |=============================================================| 0xFA000000 --| # | FvExtendedPostMemory | | # |-------------------------------------------------------------| 0xF9F80000 | # | FvExtendedAdvanced | | # |-------------------------------------------------------------| 0xF9F00000 | Extended BIOS Region mapping from ROM # | | | # | | | # | | | # ==============================================================| 0xF8000000 --| # | | # | | # | | # |-------------------------------------------------------------| 0 !if gInsydeTokenSpaceGuid.PcdH2OMultiBoardSupported == FALSE !if gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport == TRUE DEFINE FLASH_BASE = 0xFD000000 DEFINE FLASH_SIZE = 0x03000000 DEFINE EXTENDED_REGION_MEMMAP_ADDRESS = 0xF8000000 DEFINE EXTENDED_REGION_SIZE = 0x02000000 DEFINE EXTENDED_REGION_IN_USE = 0x00100000 !else DEFINE FLASH_BASE = 0xFF000000 DEFINE FLASH_SIZE = 0x01000000 !endif # End PcdExtendedBiosRegionSupport !else DEFINE FLASH_BASE = 0xFF000000 DEFINE FLASH_SIZE = 0x01000000 !endif # End PcdH2OMultiBoardSupported DEFINE BLOCK_SIZE = 0x00001000 DEFINE NUM_BLOCKS = $(FLASH_SIZE)/$(BLOCK_SIZE) !if gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport == TRUE SET gBoardModuleTokenSpaceGuid.PcdFlashExtendRegionOffset = 0x01F00000 # equal to flash base + flash size - 16MB - extended BIOS region in use SET gBoardModuleTokenSpaceGuid.PcdFlashExtendRegionSizeInUse = 0x00100000 # equal to the macro setting for extneded BIOS region in use DEFINE EXTENDED_ADVANCED_OFFSET = 0x01F00000 DEFINE EXTENDED_ADVANCED_SIZE = 0x00080000 DEFINE EXTENDED_POST_MEMORY_OFFSET = 0x01F80000 DEFINE EXTENDED_POST_MEMORY_SIZE = 0x00080000 !endif !if gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport == TRUE DEFINE FLASH_REGION_FVEC_OFFSET = 0x02000000 !else DEFINE FLASH_REGION_FVEC_OFFSET = 0x00000000 !endif !if $(EC_SHARED_FLASH_SUPPORT) == YES DEFINE FLASH_REGION_FVEC_SIZE = 0x00010000 !else DEFINE FLASH_REGION_FVEC_SIZE = 0x00000000 !endif #[-start-210513-KEBIN00001-modify]# # # Allocate 256KB(0x20000) ROM size for EC # DEFINE FLASH_REGION_EC_OFFSET = $(FLASH_REGION_FVEC_OFFSET) DEFINE FLASH_REGION_EC_SIZE = 0x00040000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_FVEC_OFFSET) + $(FLASH_REGION_EC_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_EC_SIZE) # # Allocate 8KB(0x2000) ROM size for LVAR Debug # DEFINE FLASH_REGION_LVAR_DEBUG_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_LVAR_DEBUG_SIZE = 0x2000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_LVAR_DEBUG_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_LVAR_DEBUG_SIZE) # # Allocate 8KB(0x2000) ROM size for LVAR Variable Service # DEFINE FLASH_REGION_LVAR_SUB1_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_LVAR_SUB1_SIZE = 0x1000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_LVAR_SUB1_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_LVAR_SUB1_SIZE) DEFINE FLASH_REGION_LVAR_SUB2_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_LVAR_SUB2_SIZE = 0x1000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_LVAR_SUB2_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_LVAR_SUB2_SIZE) #[-end-210528-BAIN000006-add]# # # WARNING: # For BIOS Guard signed recovery, # FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_OFFSET must meet the limitation of PFAT program.(64K) # #[-start-210513-KEBIN00001-modify]# #DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_OFFSET = $(FLASH_REGION_FVEC_OFFSET) + $(FLASH_REGION_FVEC_SIZE) # 0x0 or 0x10000 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) #kebin poweron #kein poweron DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_SIZE = 0x00043000 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_OFFSET) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_SIZE) DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE) DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_SIZE) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE) DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FACTORY_COPY_OFFSET = $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE) DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FACTORY_COPY_SIZE = 0x00020000 !if gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 1 || gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2 # NV_VARIABLE_STORE ~ NV_FACTORY_COPY DEFINE VARIABLE_REGION_SIZE = $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_SIZE) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FACTORY_COPY_SIZE) !endif DEFINE FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_BVDT_OFFSET = $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FACTORY_COPY_OFFSET)+ $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FACTORY_COPY_SIZE) DEFINE FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_BVDT_SIZE = 0x00001000 #[-start-190612-IB16990049-add]# DEFINE FLASH_REGION_NV_COMMON_STORE_SUBREGION_OEM_DMI_STORE_OFFSET = $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_BVDT_OFFSET) + $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_BVDT_SIZE) DEFINE FLASH_REGION_NV_COMMON_STORE_SUBREGION_OEM_DMI_STORE_SIZE = 0x00001000 #[-end-190612-IB16990049-add]# # # MSDM will be protected on BIOS Guard update. # Insyde BIOS guard program unit is 64K,so address must be 64k alignment. # [Reference setting for the platform doesn't support BIOS Guard] # DEFINE FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_MSDM_DATA_OFFSET = $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_OEM_DMI_STORE_OFFSET) + $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_OEM_DMI_STORE_SIZE) DEFINE FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_MSDM_DATA_SIZE = 0x00010000 # # WARNING: # Preserve variable defaults region for variable defaults feature. # DEFINE FLASH_REGION_FV_VARIABLE_DEFAULTS_OFFSET = $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_MSDM_DATA_OFFSET) + $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_MSDM_DATA_SIZE) DEFINE FLASH_REGION_FV_VARIABLE_DEFAULTS_SIZE = 0x00030000 DEFINE FLASH_REGION_FV_OPTIONAL_OFFSET = $(FLASH_REGION_FV_VARIABLE_DEFAULTS_OFFSET) + $(FLASH_REGION_FV_VARIABLE_DEFAULTS_SIZE) #[-start-220125-BAIN000092-modify]# #_Start_L05_ALDERLAKE_PLATFORM_ # # AlderLake FLASH_REGION_FVMAIN_SIZE is too tight. # After enable L05_SMB_BIOS_ENABLE function, Feature will borrow 0xC0000 to FLASH_REGION_FVMAIN_SIZE. # #DEFINE FLASH_REGION_FV_OPTIONAL_SIZE = 0x00280000 !if $(L05_SMB_BIOS_ENABLE) == NO DEFINE FLASH_REGION_L05_FVMAIN_BORROW_FROM_FV_OPTIONAL_SIZE = 0x00000000 !else DEFINE FLASH_REGION_L05_FVMAIN_BORROW_FROM_FV_OPTIONAL_SIZE = 0x000C0000 !endif DEFINE FLASH_REGION_FV_OPTIONAL_SIZE = 0x00180000 - $(FLASH_REGION_L05_FVMAIN_BORROW_FROM_FV_OPTIONAL_SIZE) #_End_L05_ALDERLAKE_PLATFORM_ #[-end-220125-BAIN000092-modify]# DEFINE FLASH_REGION_FV_SECURITY_OFFSET = $(FLASH_REGION_FV_OPTIONAL_OFFSET) + $(FLASH_REGION_FV_OPTIONAL_SIZE) DEFINE FLASH_REGION_FV_SECURITY_SIZE = 0X00070000 #_Start_L05_FEATURE_ # # Initialize definition to allocate Flash region for Feature using # DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_FV_SECURITY_OFFSET) + $(FLASH_REGION_FV_SECURITY_SIZE) #[-start-220125-BAIN000092-remove]# #DEFINE FLASH_REGION_L05_FEATURE_USED_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) #DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = 0x00000000 #[-end-220125-BAIN000092-remove]# DEFINE FLASH_REGION_L05_BORROW_FROM_FV_MAIN_SIZE = 0x00000000 DEFINE FLASH_REGION_L05_BORROW_FROM_FV_RECOVERY_SIZE = 0x00000000 !if $(L05_ALL_FEATURE_ENABLE) == YES # # Allocate 8KB(0x2000) ROM size for "Specific" Variable Service # !if $(L05_SPECIFIC_VARIABLE_SERVICE_ENABLE) == YES DEFINE FLASH_REGION_L05_VARIABLE_1_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_L05_VARIABLE_1_SIZE = 0x00001000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_L05_VARIABLE_1_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_L05_VARIABLE_1_SIZE) DEFINE FLASH_REGION_L05_VARIABLE_2_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_L05_VARIABLE_2_SIZE = 0x00001000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_L05_VARIABLE_2_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_L05_VARIABLE_2_SIZE) !else #_Start_L05_VARIABLE_SERVICE_ # # Allocate 4KB(0x1000) ROM size for EEPROM # #_Start_L05_EEPROM_REGION_ DEFINE FLASH_REGION_FVEEPROM_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_FVEEPROM_SIZE = 0x00001000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_FVEEPROM_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_FVEEPROM_SIZE) #_End_L05_EEPROM_REGION_ #_Start_L05_CHANGE_SYSTEM_PASSWORD_STORE_ # # Allocate 4KB(0x1000) ROM size for supervisor and user password # # L05_NOTEBOOK_PASSWORD_ENABLE = NO L05_NOTEBOOK_PASSWORD_ENABLE = YES # |------------------------------------------| 0X00000000 |------------------------------------------| 0X00000000 # | L05_SYSTEM_SUPERVISOR_PASSWORDS | | L05_SYSTEM_SUPERVISOR_PASSWORDS | # |------------------------------------------| 0x00000020 |------------------------------------------| 0x00000020 # | (Free Space Pool) | | (Free Space Pool) | # |------------------------------------------| 0X00000800 |------------------------------------------| 0X00000800 # | L05_SYSTEM_USER_PASSWORDS | | L05_SYSTEM_USER_PASSWORDS | # |------------------------------------------| 0x00000820 |------------------------------------------| 0x00000820 # | (Free Space Pool) | | (Free Space Pool) | # |------------------------------------------| 0x00000FF9 |------------------------------------------| 0x00000FC0 # | L05_SECURITY_PASSWORD_ENCODE_HEADER | | L05_HDD_PASSWORD_SECURITY_KEY | # |------------------------------------------| 0x00001000 |------------------------------------------| 0x00000FE0 # | L05_BIOS_PASSWORD_RANDOM_NUMBER_REGION | # |------------------------------------------| 0x00001000 # DEFINE FLASH_REGION_L05_SYSTEM_SUPERVISOR_PASSWORDS_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_L05_SYSTEM_SUPERVISOR_PASSWORDS_SIZE = 0x00000800 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_L05_SYSTEM_SUPERVISOR_PASSWORDS_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_L05_SYSTEM_SUPERVISOR_PASSWORDS_SIZE) DEFINE FLASH_REGION_L05_SYSTEM_USER_PASSWORDS_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_L05_SYSTEM_USER_PASSWORDS_SIZE = 0x00000800 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_L05_SYSTEM_USER_PASSWORDS_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_L05_SYSTEM_USER_PASSWORDS_SIZE) #_End_L05_CHANGE_SYSTEM_PASSWORD_STORE_ #_End_L05_VARIABLE_SERVICE_ !endif # # Allocate 4KB(0x1000) ROM size for SLP 2.0 # DEFINE FLASH_REGION_L05_SLP20_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_L05_SLP20_SIZE = 0x00001000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_L05_SLP20_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_L05_SLP20_SIZE) # # Allocate 4KB(0x1000) ROM size for Computrace # DEFINE FLASH_REGION_L05_COMPUTRACE_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_L05_COMPUTRACE_SIZE = 0x00001000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_L05_COMPUTRACE_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_L05_COMPUTRACE_SIZE) # # Allocate 160KB(0x28000) ROM size for Computrace FV # DEFINE FLASH_REGION_L05_FVCOMPUTRACE_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_L05_FVCOMPUTRACE_SIZE = 0x00028000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_L05_FVCOMPUTRACE_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_L05_FVCOMPUTRACE_SIZE) # # Allocate 300KB(0x4B000) ROM size for customize multi-logo from reserved 600KB region. # DEFINE FLASH_REGION_L05_CUSTOMIZE_MULTI_LOGO_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_L05_CUSTOMIZE_MULTI_LOGO_SIZE = 0x0004B000 DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_L05_CUSTOMIZE_MULTI_LOGO_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_L05_CUSTOMIZE_MULTI_LOGO_SIZE) # # Allocate 600KB(0x96000) ROM size for new features requested or future other purpose. # 300KB(0x4B000) ROM size be supported for customize multi-logo. # DEFINE FLASH_REGION_L05_RESERVED_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) DEFINE FLASH_REGION_L05_RESERVED_SIZE = 0x00096000 - $(FLASH_REGION_L05_CUSTOMIZE_MULTI_LOGO_SIZE) DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) + $(FLASH_REGION_L05_RESERVED_SIZE) DEFINE FLASH_REGION_L05_FEATURE_USED_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_L05_RESERVED_SIZE) # # Set the borrow region size from FV Main or FV Recovery region if need # DEFINE FLASH_REGION_L05_BORROW_FROM_FV_MAIN_SIZE = 0x00000000 DEFINE FLASH_REGION_L05_BORROW_FROM_FV_RECOVERY_SIZE = 0x00000000 #[-start-220125-BAIN000092-add]# # # Set Extra SBB size # DEFINE FLASH_REGION_L05_EXTRA_SBB_SIZE = $(FLASH_REGION_L05_FEATURE_USED_SIZE) + $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_BVDT_SIZE) + $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_OEM_DMI_STORE_SIZE) + $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_MSDM_DATA_SIZE) + $(FLASH_REGION_FV_VARIABLE_DEFAULTS_SIZE) + $(FLASH_REGION_FV_OPTIONAL_SIZE) + $(FLASH_REGION_FV_SECURITY_SIZE) #[-end-220125-BAIN000092-add]# !endif # !if $(L05_ALL_FEATURE_ENABLE) == YES # # Set the current location for next Flash Region # DEFINE FLASH_REGION_CURRENT_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) #_End_L05_FEATURE_ #_Start_L05_FEATURE_ #DEFINE FLASH_REGION_FVMAIN_OFFSET = $(FLASH_REGION_FV_SECURITY_OFFSET) + $(FLASH_REGION_FV_SECURITY_SIZE) DEFINE FLASH_REGION_FVMAIN_OFFSET = $(FLASH_REGION_CURRENT_OFFSET) #_End_L05_FEATURE_ #[-start-200225-IB16740092-modify]# #_Start_L05_FEATURE_ #DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00424000 - $(FLASH_REGION_FVEC_SIZE) - $(FLASH_REGION_FVUNSIGNED_SIZE) - $(FLASH_REGION_INSYDE_BOOT_LOGO_SIZE) #[-start-220125-BAIN000092-modify]# #DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00424000 - $(FLASH_REGION_FVEC_SIZE) - $(FLASH_REGION_FVUNSIGNED_SIZE) - $(FLASH_REGION_INSYDE_BOOT_LOGO_SIZE) + $(FLASH_REGION_L05_FVMAIN_BORROW_FROM_FV_OPTIONAL_SIZE) - $(FLASH_REGION_L05_FEATURE_USED_SIZE) DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00524000 - $(FLASH_REGION_FVEC_SIZE) - $(FLASH_REGION_FVUNSIGNED_SIZE) - $(FLASH_REGION_INSYDE_BOOT_LOGO_SIZE) + $(FLASH_REGION_L05_FVMAIN_BORROW_FROM_FV_OPTIONAL_SIZE) - $(FLASH_REGION_L05_FEATURE_USED_SIZE) #[-end-220125-BAIN000092-modify]# #_End_L05_FEATURE_ #[-end-200225-IB16740092-modify]# # Unsigned Region Start DEFINE FLASH_REGION_FVUNSIGNED_OFFSET = $(FLASH_REGION_FVMAIN_OFFSET) + $(FLASH_REGION_FVMAIN_SIZE) !if $(UNSIGNED_FV_SUPPORT) == YES DEFINE FLASH_REGION_FVUNSIGNED_SIZE = 0x00010000 !else DEFINE FLASH_REGION_FVUNSIGNED_SIZE = 0x00000000 !endif DEFINE FLASH_REGION_INSYDE_BOOT_LOGO_OFFSET = $(FLASH_REGION_FVUNSIGNED_OFFSET) + $(FLASH_REGION_FVUNSIGNED_SIZE) !if gInsydeTokenSpaceGuid.PcdH2OBdsOemBadgingSupported DEFINE FLASH_REGION_INSYDE_BOOT_LOGO_SIZE = 0x00000000 !else DEFINE FLASH_REGION_INSYDE_BOOT_LOGO_SIZE = 0x00004000 !endif # Unsigned total regions contain: FVUNSIGNED and INSYDE_BOOT_LOGO !if $(UNSIGNED_FV_SUPPORT) == YES DEFINE FLASH_REGION_FVUNSIGNED_TOTAL_SIZE = $(FLASH_REGION_FVUNSIGNED_SIZE) + $(FLASH_REGION_INSYDE_BOOT_LOGO_SIZE) !endif # Unsigned Region End !if $(TARGET) == RELEASE || gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport != 0 # # For Top Swap function or Chasm Falls. # If you changed the size of top swap in ME/FIT tool, you also need to change this region size. # DEFINE FLASH_REGION_FW_RESILIENCY_RESERVED_OFFSET = $(FLASH_REGION_INSYDE_BOOT_LOGO_OFFSET) + $(FLASH_REGION_INSYDE_BOOT_LOGO_SIZE) # Must same as gInsydeTokenSpaceGuid.PcdFlashPbbSize DEFINE FLASH_REGION_FW_RESILIENCY_RESERVED_SIZE = 0x00400000 # # WARNING: # When change the size of Reserved FV, please make sure the Boot Guard ACM module is location at 128K boundary when Boot Guard is enabled. # Otherwise the system cannot boot success # DEFINE FLASH_REGION_FW_BINARIES_OFFSET = $(FLASH_REGION_FW_RESILIENCY_RESERVED_OFFSET) + $(FLASH_REGION_FW_RESILIENCY_RESERVED_SIZE) DEFINE FLASH_REGION_FW_BINARIES_SIZE = 0x00080000 !else # # WARNING: # When change the size of Reserved FV, please make sure the Boot Guard ACM module is location at 128K boundary when Boot Guard is enabled. # Otherwise the system cannot boot success # DEFINE FLASH_REGION_FW_BINARIES_OFFSET = $(FLASH_REGION_INSYDE_BOOT_LOGO_OFFSET) + $(FLASH_REGION_INSYDE_BOOT_LOGO_SIZE) DEFINE FLASH_REGION_FW_BINARIES_SIZE = 0x00080000 !endif #[-start-190828-IB11270245-modify]# DEFINE FLASH_REGION_FV_MICROCODE_OFFSET = $(FLASH_REGION_FW_BINARIES_OFFSET) + $(FLASH_REGION_FW_BINARIES_SIZE) #[-end-190828-IB11270245-modify]# #[-start-200225-IB16740092-modify]# !if $(TARGET) == DEBUG && gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2 DEFINE FLASH_REGION_FV_MICROCODE_SIZE = 0x00040000 !else DEFINE FLASH_REGION_FV_MICROCODE_SIZE = 0x00080000 !endif #[-end-200225-IB16740092-modify]# !if $(TARGET) == RELEASE || gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport != 0 # # WARNING: # 1. FLASH_REGION_FV_RECOVERY2_OFFSET ~ FLASH_REGION_FV_RECOVERY2_SIZE + 64K is reserved for BootGuard # If you change FLASH_REGION_FV_RECOVERY2_OFFSET, you also need to adjust these driver location: # FitTableReserved.bin\bootGuardAcmPad.bin\BootGuardAcm.bin # 2. If your platform support Boot Guard function. FLASH_REGION_FV_RECOVERY_SIZE can not over 0x140000 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = $(FLASH_REGION_FV_MICROCODE_OFFSET) + $(FLASH_REGION_FV_MICROCODE_SIZE) !if $(TARGET) == DEBUG && gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00039000 !else DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0003D000 !endif DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = $(FLASH_REGION_FV_RECOVERY2_OFFSET) + $(FLASH_REGION_FV_RECOVERY2_SIZE) !if $(TARGET) == DEBUG && gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x000DA000 !else DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00086000 !endif !else # # WARNING: # 1. FLASH_REGION_FV_RECOVERY2_OFFSET ~ FLASH_REGION_FV_RECOVERY2_SIZE + 64K is reserved for BootGuard # If you change FLASH_REGION_FV_RECOVERY2_OFFSET, you also need to adjust these driver location: # FitTableReserved.bin\bootGuardAcmPad.bin\BootGuardAcm.bin # 2. If your platform support Boot Guard function. FLASH_REGION_FV_RECOVERY_SIZE can not over 0x140000 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = $(FLASH_REGION_FV_MICROCODE_OFFSET) + $(FLASH_REGION_FV_MICROCODE_SIZE) DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00219000 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = $(FLASH_REGION_FV_RECOVERY2_OFFSET) + $(FLASH_REGION_FV_RECOVERY2_SIZE) DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x002AA000 !endif #[-start-190828-IB11270245-add]# # # WARNING: # Please do not change the name of below FSP-S region define and leave the value as plain code (not computed by variables). It will be parsed by RebaseAndPatchFspBinBaseAddress.py. # DEFINE FLASH_REGION_FV_FSP_S_OFFSET = $(FLASH_REGION_FV_RECOVERY_OFFSET) + $(FLASH_REGION_FV_RECOVERY_SIZE) #[-start-200225-IB16740092-modify]# DEFINE FLASH_REGION_FV_FSP_S_SIZE = 0x000AF000 #[-end-200225-IB16740092-modify]# #[-end-190828-IB11270245-add]# # # WARNING: # Please do not change the name of below FSP-M/T region define and leave the value as plain code (not computed by variables). It will be parsed by RebaseAndPatchFspBinBaseAddress.py. # #[-start-190827-IB11270245-modify]# DEFINE FLASH_REGION_FV_FSP_M_OFFSET = $(FLASH_REGION_FV_FSP_S_OFFSET) + $(FLASH_REGION_FV_FSP_S_SIZE) #[-start-200225-IB16740092-modify]# !if $(TARGET) == DEBUG && gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2 DEFINE FLASH_REGION_FV_FSP_M_SIZE = 0x00140000 !else DEFINE FLASH_REGION_FV_FSP_M_SIZE = 0x00150000 !endif #[-end-200225-IB16740092-modify]# DEFINE FLASH_REGION_FV_FSP_T_OFFSET = $(FLASH_REGION_FV_FSP_M_OFFSET) + $(FLASH_REGION_FV_FSP_M_SIZE) DEFINE FLASH_REGION_FV_FSP_T_SIZE = 0x00010000 #[-start-190612-IB16990049-add]# DEFINE FLASH_REGION_FLASH_DEVICE_MAP_OFFSET = $(FLASH_REGION_FV_FSP_T_OFFSET) + $(FLASH_REGION_FV_FSP_T_SIZE) #[-end-190827-IB11270245-modify]# DEFINE FLASH_REGION_FLASH_DEVICE_MAP_SIZE = 0x00001000 DEFINE FLASH_REGION_FV_RECOVERY0_OFFSET = $(FLASH_REGION_FLASH_DEVICE_MAP_OFFSET) + $(FLASH_REGION_FLASH_DEVICE_MAP_SIZE) DEFINE FLASH_REGION_FV_RECOVERY0_SIZE = 0x0002D000 #[-end-190612-IB16990049-add]# !endif ################################################################################ # # FD Section # The [FD] Section is made up of the definition statements and a # description of what goes into the Flash Device Image. Each FD section # defines one flash "device" image. A flash device image may be one of # the following: Removable media bootable image (like a boot floppy # image,) an Option ROM image (that would be "flashed" into an add-in # card,) a System "Flash" image (that would be burned into a system's # flash) or an Update ("Capsule") image that will be used to update and # existing system flash. # ################################################################################ [FD.AlderLakeP] BaseAddress = $(FLASH_BASE) | gInsydeTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the FLASH Device. Size = $(FLASH_SIZE) | gInsydeTokenSpaceGuid.PcdFlashAreaSize #The size in bytes of the FLASH Device ErasePolarity = 1 BlockSize = $(BLOCK_SIZE) #NumBlocks = 0x400 NumBlocks = $(NUM_BLOCKS) # Size = NumBlocks x BlockSize Layout = PackUp ################################################################################ # # Following are lists of FD Region layout which correspond to the locations of different # images within the flash device. # # Regions must be defined in ascending order and may not overlap. # # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by # the pipe "|" character, followed by the size of the region, also in hex with the leading # "0x" characters. Like: # Offset|Size # PcdOffsetCName|PcdSizeCName # # # ################################################################################ !if gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport == TRUE # # Firmware Volumes for Extended BIOS Region # $(EXTENDED_ADVANCED_OFFSET)|$(EXTENDED_ADVANCED_SIZE) gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedAdvancedOffset|gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedAdvancedSize RegionType = gH2OFlashMapRegionUnknownGuid FV = FvExtendedAdvanced SET gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedAdvancedBase = $(EXTENDED_REGION_MEMMAP_ADDRESS) + $(EXTENDED_ADVANCED_OFFSET) $(EXTENDED_POST_MEMORY_OFFSET)|$(EXTENDED_POST_MEMORY_SIZE) gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedPostMemoryOffset|gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedPostMemorySize RegionType = gH2OFlashMapRegionUnknownGuid FV = FvExtendedPostMemory SET gBoardModuleTokenSpaceGuid.PcdFlashFvExtendedPostMemoryBase = $(EXTENDED_REGION_MEMMAP_ADDRESS) + $(EXTENDED_POST_MEMORY_OFFSET) !endif !if gChipsetPkgTokenSpaceGuid.PcdEcSharedFlashSupported $(FLASH_REGION_FVEC_OFFSET)|$(FLASH_REGION_FVEC_SIZE) gChipsetPkgTokenSpaceGuid.PcdFlashFvEcBase|gChipsetPkgTokenSpaceGuid.PcdFlashFvEcSize RegionType = gH2OFlashMapRegionEcGuid FILE = $(PROJECT_PKG)/Binary/Insyde/Ec/EmuEc.bin !endif #[-start-210616-YUNLEI0102-modify] # # borrow 256K(40000) from L05 Feature reserved region for EC binary. # $(FLASH_REGION_EC_OFFSET)|$(FLASH_REGION_EC_SIZE) gEfiLfcPkgTokenSpaceGuid.PcdFlashEcBase|gEfiLfcPkgTokenSpaceGuid.PcdFlashEcSize FILE = $(PROJECT_PKG)/Binary/EC/$(EC_ROM_VERSION) #[-end-210616-YUNLEI0102-modify] #[-start-210528-BAIN000006-add]# $(FLASH_REGION_LVAR_DEBUG_OFFSET)|$(FLASH_REGION_LVAR_DEBUG_SIZE) gEfiLfcPkgTokenSpaceGuid.PcdFlashFvLvarDebugBase|gEfiLfcPkgTokenSpaceGuid.PcdFlashFvLvarDebugSize DATA = { 0x4C, 0x44, 0x42, 0x47, 0xFF, 0xFF, 0xFF, 0xFF, #"LDBG" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } $(FLASH_REGION_LVAR_SUB1_OFFSET)|$(FLASH_REGION_LVAR_SUB1_SIZE) gEfiLfcPkgTokenSpaceGuid.PcdFlashFvLvarSub1Base|gEfiLfcPkgTokenSpaceGuid.PcdFlashFvLvarSub1Size DATA = { 0x4C, 0x45, 0x4E, 0x56, 0x00, 0x00, 0x00, 0x00, #//"LENV" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } $(FLASH_REGION_LVAR_SUB2_OFFSET)|$(FLASH_REGION_LVAR_SUB2_SIZE) gEfiLfcPkgTokenSpaceGuid.PcdFlashFvLvarSub2Base|gEfiLfcPkgTokenSpaceGuid.PcdFlashFvLvarSub2Size DATA = { 0x4C, 0x45, 0x4E, 0x56, 0x00, 0x00, 0x00, 0x00, #//"LENV" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } #[-end-210528-BAIN000006-add]# $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_VARIABLE_STORE_SIZE) gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize RegionType = gH2OFlashMapRegionVarGuid FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/NvStore.bin $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE) gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize RegionType = gH2OFlashMapRegionFtwStateGuid #NV_FTW_WORKING FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/FtwWork.bin $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE) gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize RegionType = gH2OFlashMapRegionFtwBackupGuid $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FACTORY_COPY_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FACTORY_COPY_SIZE) gInsydeTokenSpaceGuid.PcdFlashNvStorageFactoryCopyBase|gInsydeTokenSpaceGuid.PcdFlashNvStorageFactoryCopySize RegionType = gH2OFlashMapRegionVarDefaultGuid | gH2OFlashMapRegionFactoryCopyGuid !if gInsydeTokenSpaceGuid.PcdH2OSecureBootSupported FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/FactoryCopy.bin !endif $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_BVDT_OFFSET)|$(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_BVDT_SIZE) gInsydeTokenSpaceGuid.PcdFlashNvStorageBvdtBase|gInsydeTokenSpaceGuid.PcdFlashNvStorageBvdtSize RegionType = gH2OFlashMapRegionBvdtGuid FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/Bvdt.bin $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_OEM_DMI_STORE_OFFSET)|$(FLASH_REGION_NV_COMMON_STORE_SUBREGION_OEM_DMI_STORE_SIZE) gInsydeTokenSpaceGuid.PcdFlashNvStorageDmiBase|gInsydeTokenSpaceGuid.PcdFlashNvStorageDmiSize RegionType = gH2OFlashMapRegionSmbiosUpdateGuid DATA = { 0x24, 0x44, 0x4D, 0x49 # $DMI } $(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_MSDM_DATA_OFFSET)|$(FLASH_REGION_NV_COMMON_STORE_SUBREGION_NV_MSDM_DATA_SIZE) gInsydeTokenSpaceGuid.PcdFlashNvStorageMsdmDataBase|gInsydeTokenSpaceGuid.PcdFlashNvStorageMsdmDataSize RegionType = gH2OFlashMapRegionMsdmGuid $(FLASH_REGION_FV_VARIABLE_DEFAULTS_OFFSET)|$(FLASH_REGION_FV_VARIABLE_DEFAULTS_SIZE) gInsydeTokenSpaceGuid.PcdFlashNvStorageVariableDefaultsBase|gInsydeTokenSpaceGuid.PcdFlashNvStorageVariableDefaultsSize !if gInsydeTokenSpaceGuid.PcdH2OFdmChainOfTrustSupported RegionType = gH2OFlashMapRegionVarDefaultGuid | 0 | 0 !else RegionType = gH2OFlashMapRegionVarDefaultGuid | 0 !endif FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/VarDefault.varrc #[-start-220125-BAIN000092-remove]# #!if $(L05_NOTEBOOK_CLOUD_BOOT_WIFI_ENABLE) == YES #[-end-220125-BAIN000092-remove]# $(FLASH_REGION_FV_OPTIONAL_OFFSET)|$(FLASH_REGION_FV_OPTIONAL_SIZE) gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset|gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize RegionType = gH2OFlashMapRegionUnknownGuid FV = FvOptional SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalBase = $(FLASH_BASE) + $(FLASH_REGION_FV_OPTIONAL_OFFSET) #[-start-220125-BAIN000092-remove]# #!endif #[-end-220125-BAIN000092-remove]# $(FLASH_REGION_FV_SECURITY_OFFSET)|$(FLASH_REGION_FV_SECURITY_SIZE) gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize RegionType = gH2OFlashMapRegionUnknownGuid FV = FvSecurity SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase = $(FLASH_BASE) + $(FLASH_REGION_FV_SECURITY_OFFSET) #[-start-220125-BAIN000092-remove]# ##_Start_L05_FEATURE_ #SET gL05ServicesTokenSpaceGuid.PcdFlashFvL05FeatureUsedBase = $(FLASH_BASE) + $(FLASH_REGION_L05_FEATURE_USED_OFFSET) #SET gL05ServicesTokenSpaceGuid.PcdFlashFvL05FeatureUsedSize = $(FLASH_REGION_L05_FEATURE_USED_SIZE) ##_End_L05_FEATURE_ #[-end-220125-BAIN000092-remove]# !if $(L05_SPECIFIC_VARIABLE_SERVICE_ENABLE) == YES $(FLASH_REGION_L05_VARIABLE_1_OFFSET)|$(FLASH_REGION_L05_VARIABLE_1_SIZE) gL05ServicesTokenSpaceGuid.PcdFlashFvL05Variable1Base|gL05ServicesTokenSpaceGuid.PcdFlashFvL05Variable1Size RegionType = gL05H2OFlashMapRegionVaribale1Guid DATA = { 0x4C, 0x45, 0x4E, 0x56, 0x00, 0x00, 0x00, 0x00, #"LENV" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } $(FLASH_REGION_L05_VARIABLE_2_OFFSET)|$(FLASH_REGION_L05_VARIABLE_2_SIZE) gL05ServicesTokenSpaceGuid.PcdFlashFvL05Variable2Base|gL05ServicesTokenSpaceGuid.PcdFlashFvL05Variable2Size RegionType = gL05H2OFlashMapRegionVaribale2Guid DATA = { 0x4C, 0x45, 0x4E, 0x56, 0x00, 0x00, 0x00, 0x00, #"LENV" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } !else #_Start_L05_VARIABLE_SERVICE_ #_Start_L05_EEPROM_REGION_ $(FLASH_REGION_FVEEPROM_OFFSET)|$(FLASH_REGION_FVEEPROM_SIZE) gL05ServicesTokenSpaceGuid.PcdFlashFvEepromBase|gL05ServicesTokenSpaceGuid.PcdFlashFvEepromSize RegionType = gL05H2OFlashMapRegionEepromGuid FILE = $(PROJECT_PKG)\Binary\Eeprom\Dummy.bin #_End_L05_EEPROM_REGION_ #_Start_L05_CHANGE_SYSTEM_PASSWORD_STORE_ $(FLASH_REGION_L05_SYSTEM_SUPERVISOR_PASSWORDS_OFFSET)|$(FLASH_REGION_L05_SYSTEM_SUPERVISOR_PASSWORDS_SIZE) gL05ServicesTokenSpaceGuid.PcdFlashFvSystemSupervisorPasswordBase|gL05ServicesTokenSpaceGuid.PcdFlashFvSystemSupervisorPasswordSize RegionType = gL05H2OFlashMapRegionSupervisorPasswordGuid $(FLASH_REGION_L05_SYSTEM_USER_PASSWORDS_OFFSET)|$(FLASH_REGION_L05_SYSTEM_USER_PASSWORDS_SIZE) gL05ServicesTokenSpaceGuid.PcdFlashFvSystemUserPasswordBase|gL05ServicesTokenSpaceGuid.PcdFlashFvSystemUserPasswordSize RegionType = gL05H2OFlashMapRegionUserPasswordGuid #_End_L05_CHANGE_SYSTEM_PASSWORD_STORE_ #_End_L05_VARIABLE_SERVICE_ !endif #_Start_L05_ACPI_SLP_20_ $(FLASH_REGION_L05_SLP20_OFFSET)|$(FLASH_REGION_L05_SLP20_SIZE) gL05ServicesTokenSpaceGuid.PcdL05FlashFvSlp20Base|gL05ServicesTokenSpaceGuid.PcdL05FlashFvSlp20Size RegionType = gL05H2OFlashMapRegionSlp20Guid #_End_L05_ACPI_SLP_20_ #_Start_L05_COMPUTRACE_ !if $(L05_COMPUTRACE_ENABLE) == YES $(FLASH_REGION_L05_COMPUTRACE_OFFSET)|$(FLASH_REGION_L05_COMPUTRACE_SIZE) gL05ServicesTokenSpaceGuid.PcdFlashFvL05ComputraceRegionBase|gL05ServicesTokenSpaceGuid.PcdFlashFvL05ComputraceRegionSize RegionType = gL05H2OFlashMapRegionComputraceGuid $(FLASH_REGION_L05_FVCOMPUTRACE_OFFSET)|$(FLASH_REGION_L05_FVCOMPUTRACE_SIZE) gL05ServicesTokenSpaceGuid.PcdFlashFvL05ComputraceFvBase|gL05ServicesTokenSpaceGuid.PcdFlashFvL05ComputraceFvSize RegionType = gH2OFlashMapRegionFvGuid | gL05H2OFlashMapRegionComputraceFvGuid FV = COMPUTRACEFV !endif #_End_L05_COMPUTRACE_ #_Start_L05_CUSTOMIZE_MULTI_LOGO_ !if $(L05_CUSTOMIZE_MULTI_LOGO_SUPPORT) == YES $(FLASH_REGION_L05_CUSTOMIZE_MULTI_LOGO_OFFSET)|$(FLASH_REGION_L05_CUSTOMIZE_MULTI_LOGO_SIZE) gL05ServicesTokenSpaceGuid.PcdFlashFvL05CustomizeMultiLogoBase|gL05ServicesTokenSpaceGuid.PcdFlashFvL05CustomizeMultiLogoSize RegionType = gL05H2OFlashMapRegionCustomizeMultiLogoGuid !endif #_End_L05_CUSTOMIZE_MULTI_LOGO_ #_Start_L05_ALL_FEATURE_ !if $(L05_ALL_FEATURE_ENABLE) == YES $(FLASH_REGION_L05_RESERVED_OFFSET)|$(FLASH_REGION_L05_RESERVED_SIZE) gL05ServicesTokenSpaceGuid.PcdFlashFvReservedBase|gL05ServicesTokenSpaceGuid.PcdFlashFvReservedSize !endif #_End_L05_ALL_FEATURE_ $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE) gInsydeTokenSpaceGuid.PcdFlashFvMainBase|gInsydeTokenSpaceGuid.PcdFlashFvMainSize # # "RegionType = region-type-guid | region-id | attributes " is a keyword to assign value to FDM entry. # This file format (FDM) is used for Flash Device Map regions, which describe the layout of a Flash Device (.fd) image. # The layout information consists of a header and then an array of flash device region entries. # Each flash device region entry describes the region type, the region identifier, the region offset (relative to the start of the image) and the size of the region. # # region-type-guid GUID that specify region type # region-id For Firmware Volume : Please assign GUID to identify DXE FV # # attributes If H2O_FLASH_DEVICE_MAP_ENTRY_ATTRIB_MUTABLE (bit 0) is set, # the region contents can be updated without updating the corresponding Hash value. # # If If H2O_FLASH_DEVICE_MAP_ENTRY_ATTRIB_IGNORE (bit 1) is set, # the region contents should be ignored. # # NOTICE : 1. Please assign GUID gH2OFlashMapRegionDxeFvGuid to DXE FV # 2. Please assign PEI FV to gH2OFlashMapRegionBootFvGuid region type # 3. Default attribute is set to H2O_FLASH_DEVICE_MAP_ENTRY_ATTRIB_MUTABLE. # !if gInsydeTokenSpaceGuid.PcdH2OFdmChainOfTrustSupported RegionType = gH2OFlashMapRegionFvGuid | gH2OFlashMapRegionDxeFvGuid | 0 !else RegionType = gH2OFlashMapRegionFvGuid | gH2OFlashMapRegionDxeFvGuid !endif FV = FVMAIN_COMPACT !if gInsydeTokenSpaceGuid.PcdUnsignedFvSupported $(FLASH_REGION_FVUNSIGNED_OFFSET)|$(FLASH_REGION_FVUNSIGNED_SIZE) gInsydeTokenSpaceGuid.PcdFlashUnsignedFvRegionBase|gInsydeTokenSpaceGuid.PcdFlashUnsignedFvRegionSize RegionType = gH2OFlashMapRegionFvGuid | gH2OFlashMapRegionUnsignedFvGuid #Unsigned FV FV = UNSIGNEDFV SET gInsydeTokenSpaceGuid.PcdEndOfFlashUnsignedFvRegionOffset = $(FLASH_REGION_FVUNSIGNED_OFFSET) + $(FLASH_REGION_FVUNSIGNED_TOTAL_SIZE) - 1 SET gInsydeTokenSpaceGuid.PcdEndOfFlashUnsignedFvRegionTotalSize = $(FLASH_REGION_FVUNSIGNED_TOTAL_SIZE) !endif !if gInsydeTokenSpaceGuid.PcdH2OBdsOemBadgingSupported == FALSE # # Region: gH2OFlashMapRegionLogoGuid # Logo initializer: Logo(posX, posY, originX, originY[, id[, format]]) # # posX, posY, originX, originY, id and format need to use decimal. # # posX !VInteger that specifies the horizontal position of the logo, relative to the # origin specified by originX. # # posY !VInteger that specifies the vertical position of the logo, relative to the # origin specified by origin. # # originX - Enumerated value that specifies the horizontal origin of the logo. # 0 = left, 1 = right, 2 = center. Default value is 2. # # originY - Enumerated value that specifies the vertical origin of the logo. # 0 = top, 1 = bottom, 2 = center. Default value is 2. # # format !VOptional enumerated value that specifies the format of the logo. # 0 = BMP, 1 = JPEG, 2 = GIF, 3 = PNG. If format is not specified, # then the tool will attempt to determine the fiel type automatically. # # id !VOptional enumerated value that specifies the logo type. # 0 = boot logo, 1 = CPU badge logo, 2 = chipset badge logo, 255 = OEM. Default value is 0. # # posX, posY: Support pixels and percentage. # Example: # Pixel: 100 # Percentage: 20% (Percentange of resolution) # #$(FLASH_REGION_INSYDE_BOOT_LOGO_OFFSET)|0x0 $(FLASH_REGION_INSYDE_BOOT_LOGO_OFFSET)|$(FLASH_REGION_INSYDE_BOOT_LOGO_SIZE) Alignment = 4096 #Resize = fit RegionType = gH2OFlashMapRegionLogoGuid | Logo (0, 19%, 2, 0) Boards = 0 FILE = InsydeModulePkg/Universal/Console/Logo/InsydeBoot/InsydeBoot.jpg !endif !if $(TARGET) == RELEASE || gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport != 0 $(FLASH_REGION_FW_RESILIENCY_RESERVED_OFFSET)|$(FLASH_REGION_FW_RESILIENCY_RESERVED_SIZE) gChipsetPkgTokenSpaceGuid.PcdFwResiliencyReservedBase|gChipsetPkgTokenSpaceGuid.PcdFwResiliencyReservedSize RegionType = gH2OFlashMapRegionUnknownGuid | 0 | 1 !endif #!if gInsydeTokenSpaceGuid.PcdH2OMultiBoardPciOptionRomSupported # # Region: gH2OFlashMapRegionOptionRomGuid # PCI Option ROM initializer: PciOptionRom(vendor-id, device-id, flags). # # Region: gH2OFlashMapRegionOptionRomBdfGuid # PCI Option ROM initializer: PciOptionRomBdf(bus, device, function, flags). # # vendor-id, device-id, bus, device, function and flags need to use hexadecimal. # # Flags # Bit mask that specifies additional information about the option ROM matching. # Bit 0: 0 = Image is in PCI option ROM format, 1 = Image is a UEFI driver. # Bit 7: 1 = Legacy Option ROM (bit 0 = 0), 0 = UEFI. # $(FLASH_REGION_FW_BINARIES_OFFSET)|$(FLASH_REGION_FW_BINARIES_SIZE) gChipsetPkgTokenSpaceGuid.PcdFlashFirmwareBinariesFvBase|gChipsetPkgTokenSpaceGuid.PcdFlashFirmwareBinariesFvSize FV = FW_BINARIES_FV !if gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2 $(FLASH_REGION_FV_MICROCODE_OFFSET)|$(FLASH_REGION_FV_MICROCODE_SIZE) gInsydeTokenSpaceGuid.PcdFlashNvStorageMicrocodeBase|gInsydeTokenSpaceGuid.PcdFlashNvStorageMicrocodeSize RegionType = gH2OFlashMapRegionFvGuid | gH2OFlashMapRegionMicrocodeGuid | 1 FV = MICROCODEFV !else $(FLASH_REGION_FV_MICROCODE_OFFSET)|$(FLASH_REGION_FV_MICROCODE_SIZE) gInsydeTokenSpaceGuid.PcdFlashNvStorageMicrocodeBase|gInsydeTokenSpaceGuid.PcdFlashNvStorageMicrocodeSize RegionType = gH2OFlashMapRegionFvGuid | gH2OFlashMapRegionMicrocodeGuid FV = MICROCODEFV !endif $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE) gChipsetPkgTokenSpaceGuid.PcdFlashFvRecovery2Base|gChipsetPkgTokenSpaceGuid.PcdFlashFvRecovery2Size #[-start-190612-IB16990049-add]# !if gInsydeTokenSpaceGuid.PcdH2OFdmChainOfTrustSupported RegionType = gH2OFlashMapRegionFvGuid | gH2OFlashMapRegionPeiFvGuid | 0 !else RegionType = gH2OFlashMapRegionFvGuid | gH2OFlashMapRegionPeiFvGuid !endif FV = RECOVERYFV2 #[-end-190612-IB16990049-add]# $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE) gInsydeTokenSpaceGuid.PcdFlashFvRecoveryBase|gInsydeTokenSpaceGuid.PcdFlashFvRecoverySize RegionType = gH2OFlashMapRegionFvGuid | gH2OFlashMapRegionPeiFvGuid FV = RECOVERYFV #[-start-190612-IB16990055-add]# # # Add gH2OFlashMapRegionDxeFvGuid Region type for FSP-S to let system build FSP-S FVHOB # Let system execute DXE drivers[PchInitDxeFsp][HeciInitDxeFsp][SaInitDxeFsp] to complete FSP dispatch mode DXE init. # !if gSiPkgTokenSpaceGuid.PcdFspWrapperEnable == TRUE $(FLASH_REGION_FV_FSP_S_OFFSET)|$(FLASH_REGION_FV_FSP_S_SIZE) gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == FALSE RegionType = gH2OFlashMapRegionFvGuid | gH2OFlashMapRegionDxeFvGuid !endif #[-start-200724-IB06462127-modify]# #[-start-200710-IB10181004-modify]# FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/FSP/Fsp_Rebased_S.fd #[-end-200710-IB10181004-modify]# #[-end-200724-IB06462127-modify]# !endif #[-end-190612-IB16990055-add]# #[-start-190902-IB11270245-modify]# !if gSiPkgTokenSpaceGuid.PcdFspWrapperEnable == TRUE $(FLASH_REGION_FV_FSP_M_OFFSET)|$(FLASH_REGION_FV_FSP_M_SIZE) gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize RegionType = gH2OFlashMapRegionUnknownGuid #FV = FSP_M #[-start-200724-IB06462127-modify]# #[-start-200710-IB10181004-modify]# FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/FSP/Fsp_Rebased_M.fd #[-end-200710-IB10181004-modify]# #[-end-200724-IB06462127-modify]# $(FLASH_REGION_FV_FSP_T_OFFSET)|$(FLASH_REGION_FV_FSP_T_SIZE) gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize RegionType = gH2OFlashMapRegionUnknownGuid #FV = FSP_T #[-start-200724-IB06462127-modify]# #[-start-200710-IB10181004-modify]# FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/FSP/Fsp_Rebased_T.fd #[-end-200710-IB10181004-modify]# #[-end-200724-IB06462127-modify]# !endif #[-end-190902-IB11270245-modify]# #[-start-190612-IB16990049-add]# $(FLASH_REGION_FLASH_DEVICE_MAP_OFFSET)|$(FLASH_REGION_FLASH_DEVICE_MAP_SIZE) gInsydeTokenSpaceGuid.PcdH2OFlashDeviceMapStart|gInsydeTokenSpaceGuid.PcdH2OFlashDeviceMapSize RegionType = gH2OFlashMapRegionFlashMapGuid FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/AlderLakeP.fdm SET gChipsetPkgTokenSpaceGuid.PcdH2OFdmOffset = $(FLASH_BASE) + $(FLASH_REGION_FLASH_DEVICE_MAP_OFFSET) SET gChipsetPkgTokenSpaceGuid.PcdH2OFdmSize = $(FLASH_REGION_FLASH_DEVICE_MAP_SIZE) #[-end-190612-IB16990049-add]# $(FLASH_REGION_FV_RECOVERY0_OFFSET)|$(FLASH_REGION_FV_RECOVERY0_SIZE) gChipsetPkgTokenSpaceGuid.PcdFlashFvRecovery0Base|gChipsetPkgTokenSpaceGuid.PcdFlashFvRecovery0Size # # "RegionType = region-type-guid | region-id | attributes " is a keyword to assign value to FDM entry. # This file format (FDM) is used for Flash Device Map regions, which describe the layout of a Flash Device (.fd) image. # The layout information consists of a header and then an array of flash device region entries. # Each flash device region entry describes the region type, the region identifier, the region offset (relative to the start of the image) and the size of the region. # # region-type-guid GUID that specify region type # region-id For Firmware Volume : Please assign GUID to identify DXE FV # # attributes If H2O_FLASH_DEVICE_MAP_ENTRY_ATTRIB_MUTABLE (bit 0) is set, # the region contents can be updated without updating the corresponding Hash value. # # If If H2O_FLASH_DEVICE_MAP_ENTRY_ATTRIB_IGNORE (bit 1) is set, # the region contents should be ignored. # # NOTICE : 1. Please assign GUID gH2OFlashMapRegionDxeFvGuid to DXE FV # 2. Please assign PEI FV to gH2OFlashMapRegionBootFvGuid region type # 3. Default attribute is set to H2O_FLASH_DEVICE_MAP_ENTRY_ATTRIB_MUTABLE. # RegionType = gH2OFlashMapRegionBootFvGuid #FvRecovery FV = RECOVERYFV0 SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = $(gInsydeTokenSpaceGuid.PcdFlashFvRecoveryBase) # # Microcode base address and size need sync with Insyde Microcode Base address and Size. # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase = $(FLASH_BASE) + $(FLASH_REGION_FV_MICROCODE_OFFSET) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = $(FLASH_REGION_FV_MICROCODE_SIZE) #[-start-190527-IB16990029-add]# SET gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress = $(FLASH_BASE) #[-end-190527-IB16990029-add]# SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_BASE) + $(FLASH_REGION_FV_MICROCODE_OFFSET) + $(gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset) SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_FV_MICROCODE_SIZE) !if gSiPkgTokenSpaceGuid.PcdFspWrapperEnable == TRUE !if gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2 SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv = 0x1000 SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = $(gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv) SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase) SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize) !else SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase) SET gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize) SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset = 0x60 !endif #[-start-200710-IB10181004-modify]# #[-start-200506-IB17800057-modify]# # ADL RC 1151 remove #SET gClientSiliconPkgTokenSpaceGuid.PcdPeiCoreFv = $(FLASH_BASE) + $(FLASH_REGION_FV_FSP_M_OFFSET) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = $(FLASH_REGION_FV_FSP_S_OFFSET) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = $(FLASH_REGION_FV_FSP_M_OFFSET) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = $(FLASH_REGION_FV_FSP_T_OFFSET) #[-end-200506-IB17800057-modify]# #[-end-200710-IB10181004-modify]# !endif #[-start-220103-BAIN000081-modify]# # # Insyde ChasmFalls Gen 1/2 bios flash layout # !if gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 1 || gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2 # FW_BINARIES ~ FV_RECOVERY0 # Must same as Top Swap Block Size in ME setting and FLASH_REGION_FW_RESILIENCY_RESERVED_SIZE SET gInsydeTokenSpaceGuid.PcdFlashPbbSize = $(FLASH_REGION_FV_RECOVERY0_SIZE) + $(FLASH_REGION_FLASH_DEVICE_MAP_SIZE) + $(FLASH_REGION_FV_FSP_T_SIZE) + $(FLASH_REGION_FV_FSP_M_SIZE) + $(FLASH_REGION_FV_FSP_S_SIZE) + $(FLASH_REGION_FV_RECOVERY_SIZE) + $(FLASH_REGION_FV_RECOVERY2_SIZE) + $(FLASH_REGION_FV_MICROCODE_SIZE) + $(FLASH_REGION_FW_BINARIES_SIZE) # NV_COMMON_STORE_SUBREGION_NV_BVDT ~ DXE_FV_RESERVED # Since the flash layout of Gen 1 is the same as Gen 2, the ChasmFalls bios flash layout of Gen 1 was changed to the same as Gen 2 !if gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 1 SET gInsydeTokenSpaceGuid.PcdFlashSbbSize = $(gInsydeTokenSpaceGuid.PcdFlashAreaSize) - $(gInsydeTokenSpaceGuid.PcdFlashPbbSize) - $(gInsydeTokenSpaceGuid.PcdFlashPbbSize) - $(VARIABLE_REGION_SIZE) # 0x00756000 !else #_Start_L05_FEATURE_ #SET gInsydeTokenSpaceGuid.PcdFlashSbbSize = $(gInsydeTokenSpaceGuid.PcdFlashAreaSize) - $(gInsydeTokenSpaceGuid.PcdFlashPbbSize) - $(gInsydeTokenSpaceGuid.PcdFlashPbbSize) - $(VARIABLE_REGION_SIZE) # 0x00756000 SET gInsydeTokenSpaceGuid.PcdFlashSbbSize = $(gInsydeTokenSpaceGuid.PcdFlashAreaSize) - $(gInsydeTokenSpaceGuid.PcdFlashPbbSize) - $(gInsydeTokenSpaceGuid.PcdFlashPbbSize) - $(VARIABLE_REGION_SIZE) - $(FLASH_REGION_L05_EXTRA_SBB_SIZE) #_End_L05_FEATURE_ !endif SET gInsydeTokenSpaceGuid.PcdFlashPbbBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + ($(gInsydeTokenSpaceGuid.PcdFlashAreaSize) - $(gInsydeTokenSpaceGuid.PcdFlashPbbSize)) # 0xFFC00000 SET gInsydeTokenSpaceGuid.PcdFlashPbbRBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + ($(gInsydeTokenSpaceGuid.PcdFlashAreaSize) - $(gInsydeTokenSpaceGuid.PcdFlashPbbSize) - $(gInsydeTokenSpaceGuid.PcdFlashPbbSize)) # 0xFF800000 #_Start_L05_FEATURE_ #SET gInsydeTokenSpaceGuid.PcdFlashSbbBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(VARIABLE_REGION_SIZE) # 0xFF0AA000 SET gInsydeTokenSpaceGuid.PcdFlashSbbBase = $(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(VARIABLE_REGION_SIZE) + $(FLASH_REGION_L05_EXTRA_SBB_SIZE) #_End_L05_FEATURE_ !endif #[-end-220103-BAIN000081-modify]# [FV.FvSecurity] BlockSize = 0x10000 FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = B58325AF-77D0-4A3B-BBBB-1105AB8497CA [FV.FvCnvUnCompact] BlockSize = 0x10000 FvForceRebase = FALSE FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = B92CF322-8AFA-4aa4-B946-005DF1D69779 FILE FV_IMAGE = 88F510A1-07BD-4700-A497-965210ABE89F { SECTION FV_IMAGE = FvWifiDxeUnCompact } FILE FV_IMAGE = 879C34A0-1C5E-456C-8DF7-391D5C39057F { SECTION FV_IMAGE = FvBlueToothDxeUnCompact } FILE FV_IMAGE = BE602BDD-5A74-406B-A9E4-BA8F9646F944 { SECTION FV_IMAGE = FvNetworkDxeUnCompact } [FV.FvWifiDxeUnCompact] BlockSize = 0x10000 FvForceRebase = FALSE FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = 33C702B0-459E-4AB8-9014-493B9A99BF26 #_Start_L05_NOTEBOOK_CLOUD_BOOT_WIFI_ # # Project need to import the matching driver of WIFI module device. # #_End_L05_NOTEBOOK_CLOUD_BOOT_WIFI_ !if gPlatformModuleTokenSpaceGuid.PcdNetworkEnable == TRUE # # WifiConnectionManagerDxe Related # !if gChipsetPkgTokenSpaceGuid.PcdUefiWirelessCnvtEnable == TRUE !if gSiPkgTokenSpaceGuid.PcdAdlLpSupport == TRUE FILE DRIVER = 7f865306-830d-4dc2-8e9a-b7856f925a0a { SECTION PE32 = $(PROJECT_PKG)/Binary/WlanDriver/$(WLAN_DRIVER_VERSION)/Supplicant/Release/Supplicant.efi SECTION UI = "SupplicantDriver" } FILE DRIVER = 32ea828b-523b-44cb-b7a4-7e0a2a49956c { SECTION PE32 = $(PROJECT_PKG)/Binary/WlanDriver/$(WLAN_DRIVER_VERSION)/FmacDriver/Release/FmacDrv.efi SECTION UI = "FmacDriver" } # !if gSiPkgTokenSpaceGuid.PcdAmtEnable == TRUE # FILE DRIVER = 71b8d0ac-aba1-46b4-8d28-09c9fca0158d { # SECTION PE32 = $(PROJECT_PKG)/Binary/WlanDriver/$(WLAN_FW_VERSION)/IwlMei/Release/IwlMei.efi # SECTION UI = "IwlMei" # } # !endif FILE FREEFORM = 979CF528-40CF-4715-88AF-516885A3151D { # SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/SoGfP4WlanFW.bin # SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/SoGfP2WlanFW.bin #Named SoGfPWlanFW.bin before version 1.2.7.21282 SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/SoHrPWlanFW.bin # SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/SoJfPWlanFW.bin # SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/TyPWlanFW.bin #Named TyGfPWlanFW.bin before version 1.2.7.21282 SECTION UI = "WlanFw" } !else FILE DRIVER = 7f865306-830d-4dc2-8e9a-b7856f925a0a { SECTION PE32 = $(PROJECT_PKG)/Binary/WlanDriver/$(WLAN_DRIVER_VERSION)/Supplicant/Release/Supplicant.efi SECTION UI = "SupplicantDriver" } FILE DRIVER = 32ea828b-523b-44cb-b7a4-7e0a2a49956c { SECTION PE32 = $(PROJECT_PKG)/Binary/WlanDriver/$(WLAN_DRIVER_VERSION)/FmacDriver/Release/FmacDrv.efi SECTION UI = "FmacDriver" } FILE FREEFORM = 979CF528-40CF-4715-88AF-516885A3151D { # SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/SoGfP4WlanFW.bin # SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/SoGfP2WlanFW.bin #Named SoGfPWlanFW.bin before version 1.2.7.21282 SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/SoHrPWlanFW.bin # SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/SoJfPWlanFW.bin # SECTION RAW = $(PROJECT_PKG)/Binary/WifiFw/$(WLAN_FW_VERSION)/TyPWlanFW.bin #Named TyGfPWlanFW.bin before version 1.2.7.21282 SECTION UI = "WlanFw" } !endif !endif !endif [FV.FvBlueToothDxeUnCompact] BlockSize = 0x10000 FvForceRebase = FALSE FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = 115e059e-2cc1-4954-b739-7fa746ac8e4c !if gPlatformModuleTokenSpaceGuid.PcdNetworkEnable == TRUE !if gChipsetPkgTokenSpaceGuid.PcdUefiWirelessCnvtEnable == TRUE FILE DRIVER = AAB8AD42-45D2-49AD-9219-257D9B495979 { SECTION PE32 = $(PROJECT_PKG)/Binary/BluetoothDriver/BtVendorConfigDxe/$(BT_DRIVER_VERSION)/BtVendorConfigDxe.efi SECTION UI = "BtVendorConfigDxe" } FILE FREEFORM = 787299E3-7623-4DE9-A89F-5A2E7BC11C0F { SECTION RAW = $(PROJECT_PKG)/Binary/BleFw/$(BT_FW_VERSION)/solar.bin SECTION UI = "SolarFW" } FILE FREEFORM = 6CF09BAB-32E3-45C9-9FC8-B43E1052A1B5 { SECTION RAW = $(PROJECT_PKG)/Binary/BleFw/$(BT_FW_VERSION)/a3solar.bin SECTION UI = "A3SolarFW" } !endif !endif [FV.FvNetworkDxeUnCompact] BlockSize = 0x10000 FvForceRebase = FALSE FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = 830c49df-3d0c-4d56-a3a6-25ab364efd39 # # Intel UEFI LAN # INF $(PROJECT_PKG)/Binary/UefiLan/$(LAN_UEFI_DRIVER_VERSION)/UefiLan.inf # # Optional FV is optionally installed and dispatched on board specific features. # [FV.FvOptional] BlockSize = 0x10000 FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = 9574B1CE-EE93-451E-B500-3E5F564244DE # # CNV FV # !if gPlatformModuleTokenSpaceGuid.PcdNetworkEnable == TRUE FILE FV_IMAGE = 4E35FD93-9C72-4c15-8C4B-E77F1DB2D793 { # # Keep the section depex right before the section of RSA2048SHA256SIGN GUID so the depex will apply to that section, # Do not place at the bottom or inside of the section. # SECTION PEI_DEPEX_EXP = {gPeiFvCnvDispatchFlagPpiGuid} !if gPlatformModuleTokenSpaceGuid.PcdDxeCompressEnable == TRUE !if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE SECTION GUIDED gEfiCertTypeRsa2048Sha256Guid PROCESSING_REQUIRED = TRUE AUTH_STATUS_VALID = TRUE { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { SECTION FV_IMAGE = FvCnvUnCompact } } !else SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { SECTION FV_IMAGE = FvCnvUnCompact } !endif !else # NoCompress !if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE # TianoCompress SECTION GUIDED gEfiCertTypeRsa2048Sha256Guid PROCESSING_REQUIRED = TRUE AUTH_STATUS_VALID = TRUE { SECTION COMPRESS PI_NONE { SECTION FV_IMAGE = FvCnvUnCompact } } !else SECTION COMPRESS PI_NONE { SECTION FV_IMAGE = FvCnvUnCompact } !endif !endif SECTION UI = "FvCnvUnCompact" } !endif #gPlatformModuleTokenSpaceGuid.PcdNetworkEnable == TRUE [FV.FvExtendedPostMemoryUncompact] BlockSize = 0x10000 FvForceRebase = FALSE FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = 61141985-F036-4E0C-9B39-841B7E39A52F !if gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport == TRUE INF $(PLATFORM_FULL_PACKAGE)/Platform/ValidateExtendedBiosRegion/Pei/ValidateExtendedBiosRegionPostMem.inf !endif [FV.FvExtendedPostMemory] BlockSize = 0x10000 FvForceRebase = FALSE FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = 21D78FA8-B8E5-4574-9A67-C05B53296936 !if gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport == TRUE # gFvExtendedPostMemoryFileGuid (AEE04B33...) is defined by DEC file FILE FV_IMAGE = AEE04B33-E2A9-4BD2-909F-1CD2F337EDAF { !if gPlatformModuleTokenSpaceGuid.PcdDxeCompressEnable == TRUE !if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE SECTION GUIDED A7717414-C616-4977-9420-844712A735BF PROCESSING_REQUIRED = TRUE AUTH_STATUS_VALID = TRUE { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress/LZMA_CUSTOM_DECOMPRESS_GUID SECTION FV_IMAGE = FvExtendedPostMemoryUncompact } } !else SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress/LZMA_CUSTOM_DECOMPRESS_GUID SECTION FV_IMAGE = FvExtendedPostMemoryUncompact } !endif !else # NoCompress !if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE SECTION GUIDED A7717414-C616-4977-9420-844712A735BF PROCESSING_REQUIRED = TRUE AUTH_STATUS_VALID = TRUE { SECTION COMPRESS PI_NONE { SECTION FV_IMAGE = FvExtendedPostMemoryUncompact } } !else SECTION COMPRESS PI_NONE { SECTION FV_IMAGE = FvExtendedPostMemoryUncompact } !endif !endif } !endif [FV.FvExtendedAdvancedUncompact] BlockSize = 0x10000 FvForceRebase = FALSE FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = C8EC1BED-D6C4-4263-9980-C141A8574D28 !if gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport == TRUE INF $(PLATFORM_FULL_PACKAGE)/Platform/ValidateExtendedBiosRegion/Dxe/ValidateExtendedBiosRegionDxe.inf !endif [FV.FvExtendedAdvanced] BlockSize = 0x10000 FvForceRebase = FALSE FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = D18A7412-E2A8-4A45-93B8-AF974DFC7599 !if gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport == TRUE # gFvExtendedAdvancedFileGuid (BB43B1EA...) is defined by DEC file FILE FV_IMAGE = BB43B1EA-DAEA-4F31-B698-CEFF423E61E8 { !if gPlatformModuleTokenSpaceGuid.PcdDxeCompressEnable == TRUE !if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE SECTION GUIDED A7717414-C616-4977-9420-844712A735BF PROCESSING_REQUIRED = TRUE AUTH_STATUS_VALID = TRUE { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress/LZMA_CUSTOM_DECOMPRESS_GUID SECTION FV_IMAGE = FvExtendedAdvancedUncompact } } !else SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress/LZMA_CUSTOM_DECOMPRESS_GUID SECTION FV_IMAGE = FvExtendedAdvancedUncompact } !endif !else # NoCompress !if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE SECTION GUIDED A7717414-C616-4977-9420-844712A735BF PROCESSING_REQUIRED = TRUE AUTH_STATUS_VALID = TRUE { SECTION COMPRESS PI_NONE { SECTION FV_IMAGE = FvExtendedAdvancedUncompact } } !else SECTION COMPRESS PI_NONE { SECTION FV_IMAGE = FvExtendedAdvancedUncompact } !endif !endif } !endif # gPlatformModuleTokenSpaceGuid.PcdExtendedBiosRegionSupport [FV.RECOVERYFV] !if gSioGuid.PcdSioDummySupported !disable INF SioDummyPkg/SioDummyPei/SioDummyPei.inf !endif #[-start-190612-IB16990055-add]# # # In FSP Dispatch mode, we should let recovery modules execute after FSP-S modules. # Add dependency gEfiEndOfPeiSignal2PpiGuid for BACKUPFV, this PPI will install at the end of FSP-S module. # !if gInsydeTokenSpaceGuid.PcdH2OUsbPeiSupported == TRUE && gSiPkgTokenSpaceGuid.PcdFspWrapperEnable == TRUE && gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == FALSE !disable FILE FV_IMAGE = E446E797-96E1-47CD-A3B5-0061B404243F FILE FV_IMAGE = E446E797-96E1-47CD-A3B5-0061B404243F { SECTION PEI_DEPEX_EXP = {gEfiEndOfPeiSignal2PpiGuid } SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress SECTION FV_IMAGE = BACKUPFV } } !endif #[-end-190612-IB16990055-add]# !if (gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport != 0) FILE FREEFORM = PCD(gChipsetPkgTokenSpaceGuid.PcdChasmFallSbbDigestFile) { SECTION RAW = $(PROJECT_PKG)/Binary/SbbDigest/SbbDigestNull.bin SECTION UI = "SbbDigest" } !endif !if (gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2) !if (gSiPkgTokenSpaceGuid.PcdBiosGuardEnable == TRUE) FILE FREEFORM = PCD(gChipsetPkgTokenSpaceGuid.PcdChasmFallBiosGuardPbbFile) { SECTION RAW = $(PROJECT_PKG)/Binary/BiosGuardAcm/BiosGuard_PBBNull.bin SECTION UI = "BiosGuard_PBB" } FILE FREEFORM = PCD(gChipsetPkgTokenSpaceGuid.PcdChasmFallBiosGuardPbbrFile) { SECTION RAW = $(PROJECT_PKG)/Binary/BiosGuardAcm/BiosGuard_PBBrNull.bin SECTION UI = "BiosGuard_PBBr" } FILE FREEFORM = PCD(gChipsetPkgTokenSpaceGuid.PcdChasmFallBiosGuardSbbFile) { SECTION RAW = $(PROJECT_PKG)/Binary/BiosGuardAcm/BiosGuard_SBBNull.bin SECTION UI = "BiosGuard_SBB" } !endif !endif # VPD FILE FREEFORM = 338FA35A-CA4A-4DBC-A6F4-9BD1593B61BC { SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin } [FV.RECOVERYFV2] FILE FREEFORM = PCD(gIntelSiliconPkgTokenSpaceGuid.PcdIntelGraphicsVbtFileGuid) { !if gSiPkgTokenSpaceGuid.PcdAdlLpSupport == FALSE SECTION RAW = $(PROJECT_PKG)/Binary/UefiGop/$(VIDEO_UEFI_DRIVER_VERSION)/VBT/Vbt.bin !else SECTION RAW = $(PROJECT_PKG)/Binary/UefiGop/$(VIDEO_UEFI_DRIVER_VERSION)/VBT/S77014VbtAdlP.bin !endif SECTION UI = "IntelGopVbt" } [FV.MICROCODEFV] BlockSize = 0x1000 FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = FALSE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE !if gChipsetPkgTokenSpaceGuid.PcdChasmFallsSupport == 2 FILE RAW = E0562501-B41B-4566-AC0F-7EA8EE817F20 { $(PROJECT_PKG)/Binary/MicrocodeUpdates/MicrocodeVersion.data } FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 { Align=4K $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/X64/Microcode.bin } !else FILE RAW = 1FAE4D78-CB33-4f73-8881-A1EA8F5EDFEF { $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/X64/Microcode.bin } !endif [FV.FW_BINARIES_FV] !if gSiPkgTokenSpaceGuid.PcdBiosGuardEnable FILE RAW = PCD (gChipsetPkgTokenSpaceGuid.PcdBiosGuardAcmFile) { $(PROJECT_PKG)/Binary/BiosGuardAcm/$(BIOS_GUARD_ACM_VERSION)/BiosGuardModule.bin } !endif # Startup ACM has 256KB alignment requirement. # FV layout designer is expected to tune FvFwBinaries FV base # and ACM_ALIGNMENT_ON_FV_BASE to meet the ACM alignment requirement # and minimize dead space in a flash at the same time. # | | # +------------------+ # | Startup ACM | # | (256KB) | # +------------------+--- 256KB align (requirement) # | BiG ACMs | ^ # +------------------+ | # | space for | | # | unsigned bins | | ACM_ALIGNMENT_ON_FV_BASE (need tune) # +------------------+ | # | FV head data | v # +------------------+--- FvFwBinaries FV base (need tune) !if (gSiPkgTokenSpaceGuid.PcdBootGuardEnable == TRUE) OR (gSiPkgTokenSpaceGuid.PcdTxtEnable == TRUE) #!if gBoardModuleTokenSpaceGuid.PcdStartupAcmBinEnable == TRUE # NOTE: Startup ACM should be aligned on 256K boundary. FILE RAW = 26fdaa3d-b7ed-4714-8509-eecf1593800d Align=$(ACM_ALIGNMENT_ON_FV_BASE) { !if $(PRODUCTION_SIGNED_ACM) == YES $(PROJECT_PKG)/Binary/BootGuardAcm/$(CBNT_BIOSAC_ACM_VERSION)/ADL_StartupACM_PW.bin !else $(PROJECT_PKG)/Binary/BootGuardAcm/$(CBNT_BIOSAC_ACM_VERSION)/ADL_StartupACM_DBG.bin !endif } #!endif !endif [FV.BACKUPFV] # # Disable unnecessary module for this chipset # !if gInsydeTokenSpaceGuid.PcdCrisisRecoverySupported !disable InsydeModulePkg/Bus/Pci/IdeBusPei/IdeBusPei.inf !if gSiPkgTokenSpaceGuid.PcdVmdEnable == TRUE INF RuleOverride=LzmaCompress $(PROJECT_PKG)/Binary/Vmd/$(VMD_UEFI_DRIVER_VERSION)/Pei/Release/RstVmdPeim.inf !endif !endif !if gInsydeTokenSpaceGuid.PcdH2OUsbPeiSupported !disable InsydeModulePkg/Bus/Pci/EhciPei/EhciPei.inf !endif ################################################################################ [FV.DXEFV] # # Intel UEFI GOP # !if $(TARGET) == DEBUG !if gSiPkgTokenSpaceGuid.PcdAdlLpSupport == FALSE INF RuleOverride=BINARY USE=X64 $(PROJECT_PKG)/Binary/UefiGop/$(VIDEO_UEFI_DRIVER_VERSION)/IntelGopDriver.inf !else INF RuleOverride=BINARY USE=X64 $(PROJECT_PKG)/Binary/UefiGop/$(VIDEO_UEFI_DRIVER_VERSION)/IntelGopDriverAdlP.inf !endif !else !if gSiPkgTokenSpaceGuid.PcdAdlLpSupport == FALSE INF RuleOverride=BINARY USE=X64 $(PROJECT_PKG)/Binary/UefiGop/$(VIDEO_UEFI_DRIVER_VERSION)/IntelGopDriver.inf !else INF RuleOverride=BINARY USE=X64 $(PROJECT_PKG)/Binary/UefiGop/$(VIDEO_UEFI_DRIVER_VERSION)/IntelGopDriverAdlP.inf !endif !endif # [-start-190902-IB16740052-add] # # Intel UEFI VMD # !if gSiPkgTokenSpaceGuid.PcdVmdEnable == TRUE INF $(PROJECT_PKG)/Binary/Vmd/$(VMD_UEFI_DRIVER_VERSION)/RstVmdDriver.inf !endif # [-end-190902-IB16740052-add] # # Hybrid Graphics # !if gChipsetPkgTokenSpaceGuid.PcdHybridGraphicsSupported FILE FREEFORM = 6135A10D-9126-4a7f-B07C-E157ADE9ACE1 { SECTION RAW = $(PROJECT_PKG)/Binary/Insyde/HybridGraphics/MasterMxm30.bin } !endif # # SLP2.0 supported # #_Start_L05_ACPI_SLP_20_ #FILE FREEFORM = PCD (gChipsetPkgTokenSpaceGuid.PcdSlp20PubkeyFile) { # SECTION RAW = $(PROJECT_PKG)/Binary/Insyde/SLP20Pubkey/SLP20Pubkey.bin #} #FILE FREEFORM = PCD (gChipsetPkgTokenSpaceGuid.PcdSlpP20MarkerFile) { # SECTION RAW = $(PROJECT_PKG)/Binary/Insyde/SLP20Marker/SLP20Marker.bin #} #_End_L05_ACPI_SLP_20_ # # OA3.0 supported # FILE FREEFORM = PCD (gChipsetPkgTokenSpaceGuid.PcdOa30MsdmDataFile) { SECTION RAW = $(PROJECT_PKG)/Binary/Insyde/Oa30MsdmData/Oa30MsdmData.bin } # # Legacy Video Rom # # !if gInsydeTokenSpaceGuid.PcdH2OCsmSupported # #[-start-190612-IB16990056-modify]# # FILE FREEFORM = PCD (gChipsetPkgTokenSpaceGuid.PcdLegacyVideoRomIclUltFile) { # SECTION RAW = $(PROJECT_PKG)/Binary/LegacyVideoRom/$(VIDEO_ROM_VERSION)/icl_ULT.dat # } # #[-end-190612-IB16990056-modify]# # !endif # # Legacy RAID Rom # # !if gInsydeTokenSpaceGuid.PcdH2OCsmSupported # FILE FREEFORM = PCD (gChipsetPkgTokenSpaceGuid.PcdLegacyRaidRomFile) { # SECTION RAW = $(PROJECT_PKG)/Binary/LegacyRaidRom/$(RAID_ROM_VERSION)/RaidOrom.bin # } # !endif # # Legacy PXE Rom # # Corporate/Intel(R) vPro : Device ID = 15E1 # Consumer : Device ID = 15E2 # # !if gInsydeTokenSpaceGuid.PcdH2OCsmSupported # FILE FREEFORM = PCD (gChipsetPkgTokenSpaceGuid.PcdLegacyUltPxeRomFile) { # SECTION RAW = $(PROJECT_PKG)/Binary/LegacyPxeRom/$(LAN_PXE_ROM_VERSION)/15E203.bin # } # !endif # # OEM Logo Rom File # FILE FREEFORM = PCD (gChipsetPkgTokenSpaceGuid.PcdOemLogoRomFile) { SECTION RAW = $(PROJECT_PKG)/Binary/Insyde/OemLogo/OemLogo1024x768.pcx } !if gInsydeTokenSpaceGuid.PcdH2OCsmSupported # # VGA Redir Rom File # FILE FREEFORM = PCD (gChipsetPkgTokenSpaceGuid.PcdVgaRedirRomFile) { SECTION RAW = $(PROJECT_PKG)/Binary/Insyde/ActiveManagement/Sol/OpromLegacy/VgaRedir.bin } !endif !if gNhltFeaturePkgTokenSpaceGuid.PcdNhltFeatureEnable == TRUE !include NhltFeaturePkg/Include/NhltFeaturePostMem.fdf !if gBoardModuleTokenSpaceGuid.PcdNhltBinEnable == TRUE # Nhlt Configuration #0 If configuration number 0 is enabled all endpoints located in NhltConf0DmicX1_38_4.bin is copied to final Nhlt. # FILE FREEFORM = 06ADC9B7-837F-47DF-AC0C-A0EE18BFAD67 { # SECTION RAW = $(PROJECT_PKG)/Binary/Hda/NhltConf0DmicX1_38_4.bin # SECTION UI = "NhltConf0DmicX1_38_4" # } # Nhlt Configuration #1. If configuration number 1 is enabled all endpoints located in NhltConf1DmicX2_38_4.bin is copied to final Nhlt. FILE FREEFORM = 54067565-B069-4260-87AC-416AC8159BD5 { SECTION RAW = $(PROJECT_PKG)/Binary/Hda/NhltConf1DmicX2_38_4.bin SECTION UI = "NhltConf1DmicX2_38_4" } # Nhlt Configuration #2. If configuration number 2 is enabled all endpoints located in NhltConf2DmicX4_38_4.bin is copied to final Nhlt. # FILE FREEFORM = 729D003A-0125-4489-B2EC-00415C88EFEB { # SECTION RAW = $(PROJECT_PKG)/Binary/Hda/NhltConf2DmicX4_38_4.bin # SECTION UI = "NhltConf2DmicX4_38_4" # } #[-start-210925-DABING0010-modify]# # Nhlt Configuration #3. If configuration number 3 is enabled all endpoints located in NhltConf3DmicX1_38_4.bin is copied to final Nhlt. FILE FREEFORM = 40801B42-4B8E-4CFC-90F6-8AAAEA82607C { SECTION RAW = $(PROJECT_PKG)/Binary/Hda/NhltConf3Bt_38_4.bin SECTION UI = "NhltConf3Bt_38_4" } #[-end-210925-DABING0010-modify]# # Nhlt Configuration #4. If configuration number 4 is enabled all endpoints located in NhltConf4I2sAlc274_38_4.bin is copied to final Nhlt. # FILE FREEFORM = 5F845818-7D38-4EBF-B410-922B8CE825BB { # SECTION RAW = $(PROJECT_PKG)/Binary/Hda/NhltConf4I2sAlc274_38_4.bin # SECTION UI = "NhltConf4I2sAlc274_38_4" # } !endif !endif !if gChipsetPkgTokenSpaceGuid.PcdRetimerCapsuleUpdateSupported == TRUE #!disable $(CHIPSET_PKG)/CapsuleIFWU/CapsuleTbtRetimer1Dxe/TbtRetimerCapsule1Dxe.inf #!disable $(CHIPSET_PKG)/CapsuleIFWU/CapsuleTbtRetimer2Dxe/TbtRetimerCapsule2Dxe.inf #!disable $(CHIPSET_PKG)/CapsuleIFWU/CapsuleTbtRetimer3Dxe/TbtRetimerCapsule3Dxe.inf !endif #[-start-190611-IB16990042-add]# # # TXT SINIT ACM file # !if gChipsetPkgTokenSpaceGuid.PcdTXTSupported !if gPlatformModuleTokenSpaceGuid.PcdSinitAcmBinEnable FILE RAW = PCD (gChipsetPkgTokenSpaceGuid.PcdSinitAcRomFile) { !if $(PRODUCTION_SIGNED_ACM) == YES $(PROJECT_PKG)/Binary/Txt/$(CBNT_SINIT_ACM_VERSION)/ADL_SinitACM_PW.bin !else $(PROJECT_PKG)/Binary/Txt/$(CBNT_SINIT_ACM_VERSION)/ADL_SinitACM_DBG.bin !endif } !endif !endif #[-end-190611-IB16990042-add]# #================================================================================ # L05 FDF Setting Start #================================================================================ !if $(L05_CUSTOMER_BGRT_LOGO_SUPPORT) == YES FILE FREEFORM = 12345678-526C-436F-AE1A-93AE757F3E36 { # SECTION RAW = $(L05_LOGO_OVERRIDE_PATH)/BGRT/L05_1024x768.jpg SECTION RAW = $(L05_LOGO_OVERRIDE_PATH)/BGRT/BIOSlogo_1366x768.tga } !endif #_Start_L05_ACPI_SLP_20_ FILE FREEFORM = A302F9BE-8504-4505-810A-165E8078E89B { SECTION RAW = $(OEM_FEATURE_COMMON_PATH)/Slp20Service/OptionRom/L05Slp20Pubkey/L05Slp20Pubkey.bin } FILE FREEFORM = 197CD442-9888-4e3b-89C1-7A3C4E30A035 { SECTION RAW = $(OEM_FEATURE_COMMON_PATH)/Slp20Service/OptionRom/L05Slp20Marker/L05Slp20MarkerKey.bin } #_End_L05_ACPI_SLP_20_ !if $(L05_RTK_USB_LAN_DRIVER_SUPPORT) == YES INF $(PROJECT_PKG)/Binary/L05UefiLan/RtkUsbUndiDxe/RtkUsbUndiDxe.inf INF $(PROJECT_PKG)/Binary/L05UefiLan/DlUefiUndi/DlUefiUndi.inf !endif #================================================================================ # L05 FDF Setting End #================================================================================ ################################################################################ [FV.FVMAIN_COMPACT] FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress SECTION FV_IMAGE = DXEFV } } # # TDS FV # !if gPlatformModuleTokenSpaceGuid.PcdTdsEnable == TRUE FILE FV_IMAGE = 15357EE2-88D9-402D-A364-76F2BD7D3052 { !if gPlatformModuleTokenSpaceGuid.PcdDxeCompressEnable == TRUE !if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE SECTION GUIDED gEfiCertTypeRsa2048Sha256Guid PROCESSING_REQUIRED = TRUE AUTH_STATUS_VALID = TRUE { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { SECTION FV_IMAGE = FvTrustedDeviceSetupUnCompact } } !else SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { SECTION FV_IMAGE = FvTrustedDeviceSetupUnCompact } !endif !else # NoCompress !if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE # TianoCompress SECTION GUIDED gEfiCertTypeRsa2048Sha256Guid PROCESSING_REQUIRED = TRUE AUTH_STATUS_VALID = TRUE { SECTION COMPRESS PI_NONE { SECTION FV_IMAGE = FvTrustedDeviceSetupUnCompact } } !else SECTION COMPRESS PI_NONE { SECTION FV_IMAGE = FvTrustedDeviceSetupUnCompact } !endif !endif } !endif # gPlatformModuleTokenSpaceGuid.PcdTdsEnable == TRUE [FV.UNSIGNEDFV] !if gInsydeTokenSpaceGuid.PcdUnsignedFvSupported # # Drivers, binary files, logos.... can be stored in this FV # !endif ################################################################################ # # Rules are use with the [FV] section's module INF type to define # how an FFS file is created for a given INF file. The following Rule are the default # rules for the different module type. User can add the customized rules to define the # content of the FFS file. # ################################################################################ [Rule.Common.USER_DEFINED.ACPITABLE] FILE FREEFORM = $(NAMED_GUID) { RAW ACPI Optional |.acpi RAW ASL Optional |.aml } [Rule.Common.USER_DEFINED.LEGACY16] FILE FREEFORM = $(NAMED_GUID) { RAW BIN |.com UI STRING="$(MODULE_NAME)" Optional VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) }