ICE_TEA_BIOS/Board/Oem/L05AlderLakeHXMultiBoardPkg/CapsuleUpdate/MicrocodeFv.fdf
LCFC\AiXia.Jiang a870bff2f4 1.Frist commit
2022-09-30 14:59:06 +08:00

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#******************************************************************************
#* Copyright (c) 2020, Insyde Software Corporation. All Rights Reserved.
#*
#* You may not reproduce, distribute, publish, display, perform, modify, adapt,
#* transmit, broadcast, present, recite, release, license or otherwise exploit
#* any part of this publication in any form, by any means, without the prior
#* written permission of Insyde Software Corporation.
#*
#******************************************************************************
## @file
# FDF file to create Capsule payload
#
#@copyright
# INTEL CONFIDENTIAL
# Copyright 2016 - 2020 Intel Corporation.
#
# The source code contained or described herein and all documents related to the
# source code ("Material") are owned by Intel Corporation or its suppliers or
# licensors. Title to the Material remains with Intel Corporation or its suppliers
# and licensors. The Material may contain trade secrets and proprietary and
# confidential information of Intel Corporation and its suppliers and licensors,
# and is protected by worldwide copyright and trade secret laws and treaty
# provisions. No part of the Material may be used, copied, reproduced, modified,
# published, uploaded, posted, transmitted, distributed, or disclosed in any way
# without Intel's prior express written permission.
#
# No license under any patent, copyright, trade secret or other intellectual
# property right is granted to or conferred upon you by disclosure or delivery
# of the Materials, either expressly, by implication, inducement, estoppel or
# otherwise. Any license under such intellectual property rights must be
# express and approved by Intel in writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter
# this notice or any other notice embedded in Materials by Intel or
# Intel's suppliers or licensors in any way.
#
# This file contains a 'Sample Driver' and is licensed as such under the terms
# of your license agreement with Intel or your vendor. This file may be modified
# by the user, subject to the additional terms of the license agreement.
#
#@par Specification Reference:
##
[Defines]
DEFINE FLASH_BLOCK_SIZE = 0x1000
#
# This FV is used for FMP ucode Capsule payload (gFmpDevicePlatformuCodeGuid)/H2O ucode capsule(PcdWindowsUcodeFirmwareCapsuleGuid)
# FV Size should be the same as uCode region on target platform
# The BlockSize(0x1000) and NumBlocks(0x80) are depends on gInsydeTokenSpaceGuid.PcdFlashNvStorageMicrocodeSize
# of Project.fdf.
#
[FV.CapsulePayloaduCode]
FvAlignment = 16
BlockSize = 0x1000 ## Use same block setting here as ADLS Platform
NumBlocks = 0x80 ## Curent ADLS setting : FLASH_REGION_FV_MICROCODE_SIZE = 0x00080000. FLASH_BLOCK_SIZE = 0x0001000
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
#
# Version FFS
# 1. MicrocodeVersion.data carries global version info to manage entire microcode Region.
# 2. MicrocodeVersion.data is auto generated by BuildCapsule.bat with default input below.
# set SLOT_SIZE=0x3B000
# set FW_VERSION=0x0002
# set LSV=0x0001
# set FW_VERSION_STRING="Version 0.0.0.2"
# set UCODE_MODE=ucodefull
#
FILE RAW = E0562501-B41B-4566-AC0F-7EA8EE817F20 {
#
# gIntelMicrocodeVersionFfsFileGuid
#
$(PROJECT_PKG)\CapsuleUpdate\Binary\MicrocodeVersion.data
}
#
# 1. uCode FFS file GUID {197DB236-F856-4924-90F8-CDF12FB875F3} is specific.
# to help binary tools to locate uCode Array.
# 2. Starting address of Microcode Array is aligned at 4KB alignment.
# PcdFlashMicrocodeOffset must also set to 4KB accordingly.
# 3. Platform use Slot mode to avoid future FIT update in case of uCode size
# change, each uCode patch below is placed in a Slot with reserved space.
# 4. uCode patches defined below will be padded and packed for slot mode
# GenMicrocodeVersion.py in NewGenCap.py performs padding job, with default SLOT_SIZE set to 0x3B000.
# 5. Use MicrocodeConverter.py to comvert ucode from inc to pdb file extension,
# then modify pdb file extension to mcb.
#
FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
#
# gIntelMicrocodeArrayFfsFileGuid
#
Align=4K $(PROJECT_PKG)\CapsuleUpdate\Binary\m_02_90670_00000019.mcb # Alder Lake-S | A-0 | 02
Align=16 $(PROJECT_PKG)\CapsuleUpdate\Binary\m_82_90671_00000019.mcb # Alder Lake-S | B-0
}