132 lines
3.4 KiB
Plaintext
132 lines
3.4 KiB
Plaintext
Begin
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;---------------Do NOT Modify Section-----------
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Set I8 0x0; Reserved
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Set I9 0x0; Image Size
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Set I7 0x0; Image BIOS Offset
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Set I5 0x0; Variable Reserved Offset
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Set I6 0x0; Varialbe Reserve Size
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Set IA 0x0; SBB Reserved Offset
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Set IB 0x0; SBB Reserved Size
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;---------------Do NOT Modify Section-----------
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;Reserve I8 IC ID IE
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// ---- Get Bios Base and Limit Process ----
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// Referenced SPI Programming Guide
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Set I0 0x0; Init I0 for save Bios Base
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Set I1 0x0; Init I1 for save Bios limit
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Set I2 0x0; Temp
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// [Step1] Find FRBA(Flash Region Base Address) offset[23:16] from FLMAP0 (FDBAR+0x14)
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Set F0 0x16; Point to offset 0x16 to get FRBA for FLMAP0 [23:16]
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Set B1 0x0; Init Buffer1 Offset
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Read B1 F0 0x1;
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Loadbyte I2 B1;
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Shiftl I2 4; FRBA
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// [Step2] Get Bios Base and size from FRBA
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Set B1 0x0;
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Add I2 0x4;
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Set F0 I2;
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Read B1 F0 0x4;
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LoadDword I2 B1; Get Base and limit to I2
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Set I0 I2;
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Set I1 I2;
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// Get BIOS Base for low Endian
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And I0 0x00007FFF;
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Shiftl I0 0xC;
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// Get BIOS Limit for high Endian
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And I1 0x7FFF0000;
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Shiftr I1 0x10
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Add I1 0x1;
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Shiftl I1 0xC
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// Step3 - Check image in Bios Range
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// Check (BIOS Base[I0] + image offset[I7] + image size[I9]) < bios limit[I1]
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Add I7 I0;
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Set I2 I7;
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Add I2 I9;
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Compare I2 I1;
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Jg _end;
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// ---- Flash Process -----
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Set I1 0x0; Intit Erase try count
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Set I2 0x0; Intit Write try count
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Set I3 0x0; Record HW Status
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Set I4 0x0; Flash Offset
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Set If 0x0; Init HW Status 0:Success
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Set B0 0x0;
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_Flash_start:
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Add I5 I0; Add Variable offset with bios base
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Add IA I0; Add reserveed offset with bios base
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Jmp _Flash_Loop
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_error_label:
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Add I1 0x1;
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Compare I1 0x3; Check erase error Max try 3 time
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Jge _erase_error_report;
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Jmp _erase;
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_write_label:
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Add I2 0x1;
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Compare I2 0x3; Check write error Max try 3 time
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Jge _write_error_report;
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Jmp _erase;
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_Flash_Loop:
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_SkipVar:
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Compare I6 0x0; Check Variable region exist by Size != 0
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Je _check_SkipRegion
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Compare I7 I5; Check Flash Offset[I7] == Variable Region Offset[I6]
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Jne _check_SkipRegion
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Add I7 I6;
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Add I4 I6;
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_check_SkipRegion:
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Compare IB 0x0; Check Reserved Region exist By Reserved Size
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Je _check_SkipRegion_End;
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Compare I7 IA; Check Flash Offset[I4] == Reserved Offset[I8]
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Jne _check_SkipRegion_End;
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Add I7 IB; Add Reserved Size to skip reserved space.
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Add I4 IB;
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_check_SkipRegion_End:
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Set F0 I7; Set the address in flash where the BIOS image resides
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Set B0 I4;
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_erase:
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Eraseblk F0; Erase
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Rdsts I3; Get HW status to I3
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Compare I3 0; Check Stats is SUCCESS(0):
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Jne _error_label;
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_write:
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Write F0 B0 0x1000;
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Rdsts I3;
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Compare I3 0;
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Jne _write_label;
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_continue:
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Set I1 0x0; Clean erase error try count
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Set I2 0x0; Clean write error try count
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Add I4 0x1000
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Compare I4 I9; Check Flash Offset in Bios Limit
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Jge _end;
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Add I7 0x1000; Increase 0x1000 for Flash Offset
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Jmp _Flash_Loop;
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_erase_error_report:
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Set If 0x1; Set If as 0x1 means Erase failed
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Jmp _end;
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_write_error_report:
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Set If 0x2; Set If as 0x2 means Write failed
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Jmp _end;
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_end:
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End
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