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325 lines
12 KiB
C
325 lines
12 KiB
C
/*
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* This file is adapted from PolarSSL 1.3.19 (GPL)
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*/
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/*
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* AES-NI support functions
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*
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* Copyright (C) 2006-2014, ARM Limited, All Rights Reserved
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*
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* This file is part of mbed TLS (https://tls.mbed.org)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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/*
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* [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
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* [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
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*/
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#include <string.h>
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#include "aesni.h"
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#if defined(HAVE_AMD64)
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/*
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* AES-NI support detection routine
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*/
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#define AESNI_AES 0x02000000u
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int aesni_supported( void )
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{
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static int done = 0;
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static unsigned int c = 0;
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if( ! done )
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{
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asm( "movl $1, %%eax \n\t"
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"cpuid \n\t"
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: "=c" (c)
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:
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: "eax", "ebx", "edx" );
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done = 1;
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}
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return( ( c & AESNI_AES ) != 0 );
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}
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/*
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* Binutils needs to be at least 2.19 to support AES-NI instructions.
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* Unfortunately, a lot of users have a lower version now (2014-04).
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* Emit bytecode directly in order to support "old" version of gas.
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*
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* Opcodes from the Intel architecture reference manual, vol. 3.
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* We always use registers, so we don't need prefixes for memory operands.
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* Operand macros are in gas order (src, dst) as opposed to Intel order
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* (dst, src) in order to blend better into the surrounding assembly code.
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*/
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#define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
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#define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
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#define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
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#define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
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#define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
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#define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
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#define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
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#define xmm0_xmm0 "0xC0"
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#define xmm0_xmm1 "0xC8"
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#define xmm0_xmm2 "0xD0"
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#define xmm0_xmm3 "0xD8"
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#define xmm0_xmm4 "0xE0"
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#define xmm1_xmm0 "0xC1"
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#define xmm1_xmm2 "0xD1"
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/*
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* AES-NI AES-ECB block en(de)cryption
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*/
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void aesni_crypt_ecb( int nr,
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unsigned char *rk,
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int mode,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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asm( "movdqu (%3), %%xmm0 \n\t" // load input
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"movdqu (%1), %%xmm1 \n\t" // load round key 0
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"pxor %%xmm1, %%xmm0 \n\t" // round 0
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"addq $16, %1 \n\t" // point to next round key
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"subl $1, %0 \n\t" // normal rounds = nr - 1
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"test %2, %2 \n\t" // mode?
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"jz 2f \n\t" // 0 = decrypt
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"1: \n\t" // encryption loop
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"movdqu (%1), %%xmm1 \n\t" // load round key
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AESENC xmm1_xmm0 "\n\t" // do round
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"addq $16, %1 \n\t" // point to next round key
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"subl $1, %0 \n\t" // loop
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"jnz 1b \n\t"
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"movdqu (%1), %%xmm1 \n\t" // load round key
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AESENCLAST xmm1_xmm0 "\n\t" // last round
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"jmp 3f \n\t"
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"2: \n\t" // decryption loop
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"movdqu (%1), %%xmm1 \n\t"
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AESDEC xmm1_xmm0 "\n\t" // do round
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"addq $16, %1 \n\t"
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"subl $1, %0 \n\t"
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"jnz 2b \n\t"
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"movdqu (%1), %%xmm1 \n\t" // load round key
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AESDECLAST xmm1_xmm0 "\n\t" // last round
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"3: \n\t"
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"movdqu %%xmm0, (%4) \n\t" // export output
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:
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: "r" (nr), "r" (rk), "r" (mode), "r" (input), "r" (output)
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: "memory", "cc", "xmm0", "xmm1" );
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}
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/*
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* Compute decryption round keys from encryption round keys
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*/
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void aesni_inverse_key( unsigned char *invkey,
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const unsigned char *fwdkey, int nr )
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{
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unsigned char *ik = invkey;
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const unsigned char *fk = fwdkey + 16 * nr;
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memcpy( ik, fk, 16 );
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for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 )
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asm( "movdqu (%0), %%xmm0 \n\t"
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AESIMC xmm0_xmm0 "\n\t"
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"movdqu %%xmm0, (%1) \n\t"
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:
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: "r" (fk), "r" (ik)
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: "memory", "xmm0" );
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memcpy( ik, fk, 16 );
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}
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/*
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* Key expansion, 128-bit case
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*/
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void aesni_setkey_enc_128( unsigned char *rk,
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const unsigned char *key )
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{
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asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key
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"movdqu %%xmm0, (%0) \n\t" // as round key 0
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"jmp 2f \n\t" // skip auxiliary routine
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/*
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* Finish generating the next round key.
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*
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* On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
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* with X = rot( sub( r3 ) ) ^ RCON.
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*
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* On exit, xmm0 is r7:r6:r5:r4
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* with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
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* and those are written to the round key buffer.
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*/
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"1: \n\t"
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"pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
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"pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
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"pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
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"pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
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"pslldq $4, %%xmm0 \n\t" // etc
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"pxor %%xmm0, %%xmm1 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
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"add $16, %0 \n\t" // point to next round key
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"movdqu %%xmm0, (%0) \n\t" // write it
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"ret \n\t"
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/* Main "loop" */
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"2: \n\t"
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AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
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AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
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:
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: "r" (rk), "r" (key)
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: "memory", "cc", "0" );
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}
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/*
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* Key expansion, 192-bit case
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*/
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void aesni_setkey_enc_192( unsigned char *rk,
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const unsigned char *key )
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{
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asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key
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"movdqu %%xmm0, (%0) \n\t"
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"add $16, %0 \n\t"
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"movq 16(%1), %%xmm1 \n\t"
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"movq %%xmm1, (%0) \n\t"
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"add $8, %0 \n\t"
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"jmp 2f \n\t" // skip auxiliary routine
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/*
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* Finish generating the next 6 quarter-keys.
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*
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* On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
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* and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
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*
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* On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
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* and those are written to the round key buffer.
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*/
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"1: \n\t"
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"pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
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"pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
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"pslldq $4, %%xmm0 \n\t" // etc
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
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"movdqu %%xmm0, (%0) \n\t"
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"add $16, %0 \n\t"
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"pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
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"pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
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"pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
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"pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
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"movq %%xmm1, (%0) \n\t"
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"add $8, %0 \n\t"
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"ret \n\t"
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"2: \n\t"
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AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
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:
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: "r" (rk), "r" (key)
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: "memory", "cc", "0" );
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}
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/*
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* Key expansion, 256-bit case
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*/
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void aesni_setkey_enc_256( unsigned char *rk,
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const unsigned char *key )
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{
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asm( "movdqu (%1), %%xmm0 \n\t"
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"movdqu %%xmm0, (%0) \n\t"
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"add $16, %0 \n\t"
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"movdqu 16(%1), %%xmm1 \n\t"
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"movdqu %%xmm1, (%0) \n\t"
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"jmp 2f \n\t" // skip auxiliary routine
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/*
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* Finish generating the next two round keys.
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*
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* On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
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* xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
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*
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* On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
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* and those have been written to the output buffer.
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*/
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"1: \n\t"
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"pshufd $0xff, %%xmm2, %%xmm2 \n\t"
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm0, %%xmm2 \n\t"
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"pslldq $4, %%xmm0 \n\t"
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"pxor %%xmm2, %%xmm0 \n\t"
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"add $16, %0 \n\t"
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"movdqu %%xmm0, (%0) \n\t"
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/* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
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* and proceed to generate next round key from there */
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AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
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"pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
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"pxor %%xmm1, %%xmm2 \n\t"
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"pslldq $4, %%xmm1 \n\t"
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"pxor %%xmm1, %%xmm2 \n\t"
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"pslldq $4, %%xmm1 \n\t"
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"pxor %%xmm1, %%xmm2 \n\t"
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"pslldq $4, %%xmm1 \n\t"
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"pxor %%xmm2, %%xmm1 \n\t"
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"add $16, %0 \n\t"
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"movdqu %%xmm1, (%0) \n\t"
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"ret \n\t"
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/*
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* Main "loop" - Generating one more key than necessary,
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* see definition of aes_context.buf
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*/
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"2: \n\t"
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AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
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AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
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:
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: "r" (rk), "r" (key)
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: "memory", "cc", "0" );
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}
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#endif /* HAVE_AMD64 */
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