222 lines
11 KiB
C
222 lines
11 KiB
C
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/*
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* Copyright (c) Nordic Semiconductor ASA
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of other
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* contributors to this software may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* 4. This software must only be used in a processor manufactured by Nordic
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* Semiconductor ASA, or in a processor manufactured by a third party that
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* is used in combination with a processor manufactured by Nordic Semiconductor.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/**
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@defgroup nrf_sdm_api SoftDevice Manager API
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@{
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@brief APIs for SoftDevice management.
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*/
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/* Header guard */
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#ifndef NRF_SDM_H__
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#define NRF_SDM_H__
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#include "nrf_svc.h"
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#include "nrf51.h"
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#include "nrf_soc.h"
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#include "nrf_error_sdm.h"
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/** @addtogroup NRF_SDM_DEFINES Defines
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* @{ */
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/** @brief SoftDevice Manager SVC Base number. */
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#define SDM_SVC_BASE 0x10
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/** @} */
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/** @brief Defines the SoftDevice Information Structure location (address) as an offset from
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the start of the softdevice (without MBR)*/
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#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000)
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/** @brief Defines the usual size reserverd for the MBR when a softdevice is written to flash.
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This is the offset where the first byte of the softdevice hex file is written.*/
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#define MBR_SIZE (0x1000)
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/** @brief Defines the absolute Softdevice information structure location (address)*/
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#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE)
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/** @brief Defines the offset for Softdevice size value relative to Softdevice base address*/
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#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08)
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/** @brief Defines the offset for FWID value relative to Softdevice base address*/
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#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C)
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/** @brief Defines a macro for retreiving the actual Softdevice size value from a given base address
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use @ref MBR_SIZE when Softdevice is installed just above the MBR (the usual case)*/
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#define SD_SIZE_GET(baseaddr) (*((uint32_t *) ((baseaddr) + SD_SIZE_OFFSET)))
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/** @brief Defines a macro for retreiving the actual FWID value from a given base address
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use @ref MBR_SIZE when Softdevice is installed just above the MBR (the usual case)*/
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#define SD_FWID_GET(baseaddr) ((*((uint32_t *) ((baseaddr) + SD_FWID_OFFSET))) & 0xFFFF)
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/** @addtogroup NRF_SDM_ENUMS Enumerations
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* @{ */
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/**@brief nRF SoftDevice Manager API SVC numbers. */
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enum NRF_SD_SVCS
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{
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SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */
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SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */
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SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */
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SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */
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SVC_SDM_LAST /**< Placeholder for last SDM SVC */
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};
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/**@brief Possible lfclk oscillator sources. */
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enum NRF_CLOCK_LFCLKSRCS
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{
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NRF_CLOCK_LFCLKSRC_SYNTH_250_PPM, /**< LFCLK Synthesized from HFCLK. */
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NRF_CLOCK_LFCLKSRC_XTAL_500_PPM, /**< LFCLK crystal oscillator 500 PPM accuracy. */
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NRF_CLOCK_LFCLKSRC_XTAL_250_PPM, /**< LFCLK crystal oscillator 250 PPM accuracy. */
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NRF_CLOCK_LFCLKSRC_XTAL_150_PPM, /**< LFCLK crystal oscillator 150 PPM accuracy. */
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NRF_CLOCK_LFCLKSRC_XTAL_100_PPM, /**< LFCLK crystal oscillator 100 PPM accuracy. */
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NRF_CLOCK_LFCLKSRC_XTAL_75_PPM, /**< LFCLK crystal oscillator 75 PPM accuracy. */
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NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, /**< LFCLK crystal oscillator 50 PPM accuracy. */
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NRF_CLOCK_LFCLKSRC_XTAL_30_PPM, /**< LFCLK crystal oscillator 30 PPM accuracy. */
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NRF_CLOCK_LFCLKSRC_XTAL_20_PPM, /**< LFCLK crystal oscillator 20 PPM accuracy. */
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_250MS_CALIBRATION, /**< LFCLK RC oscillator, 250ms calibration interval.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_500MS_CALIBRATION, /**< LFCLK RC oscillator, 500ms calibration interval.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_1000MS_CALIBRATION, /**< LFCLK RC oscillator, 1000ms calibration interval.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_2000MS_CALIBRATION, /**< LFCLK RC oscillator, 2000ms calibration interval.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_4000MS_CALIBRATION, /**< LFCLK RC oscillator, 4000ms calibration interval.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_8000MS_CALIBRATION, /**< LFCLK RC oscillator, 8000ms calibration interval.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_1000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 1000ms, if changed above a threshold, a calibration is done.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_2000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 2000ms, if changed above a threshold, a calibration is done.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_4000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 4000ms, if changed above a threshold, a calibration is done.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_8000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 8000ms, if changed above a threshold, a calibration is done.*/
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NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_16000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 16000ms, if changed above a threshold, a calibration is done.*/
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};
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/** @} */
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/** @addtogroup NRF_SDM_TYPES Types
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* @{ */
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/**@brief Type representing lfclk oscillator source. */
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typedef uint32_t nrf_clock_lfclksrc_t;
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/**@brief SoftDevice Assertion Handler type.
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*
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* When an unexpected error occurs within the SoftDevice it will call the SoftDevice assertion handler callback.
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* The protocol stack will be in an undefined state when this happens and the only way to recover will be to
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* perform a reset, using e.g. CMSIS NVIC_SystemReset().
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*
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* @note This callback is executed in HardFault context, thus SVC functions cannot be called from the SoftDevice assert callback.
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*
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* @param[in] pc The program counter of the failed assert.
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* @param[in] line_number Line number where the assert failed.
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* @param[in] file_name File name where the assert failed.
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*/
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typedef void (*softdevice_assertion_handler_t)(uint32_t pc, uint16_t line_number, const uint8_t * p_file_name);
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/** @} */
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/** @addtogroup NRF_SDM_FUNCTIONS Functions
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* @{ */
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/**@brief Enables the SoftDevice and by extension the protocol stack.
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*
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* Idempotent function to enable the SoftDevice.
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*
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* @note Some care must be taken if a low frequency clock source is already running when calling this function:
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* If the LF clock has a different source then the one currently running, it will be stopped. Then, the new
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* clock source will be started.
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*
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* @note This function has no effect when returning with an error.
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*
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* @post If return code is ::NRF_SUCCESS
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* - SoC library and protocol stack APIs are made available.
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* - A portion of RAM will be unavailable (see relevant SDS documentation).
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* - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation).
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* - Interrupts will not arrive from protected peripherals or interrupts.
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* - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the softdevice.
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* - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation).
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* - Chosen low frequency clock source will be running.
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*
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* @param clock_source Low frequency clock source and accuracy. (Note: In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock).
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* @param assertion_handler Callback for SoftDevice assertions.
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*
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* @retval ::NRF_SUCCESS
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* @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and assertion handler cannot be updated.
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* @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDeviceinterrupt is already enabled, or an enabled interrupt has an illegal priority level.
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* @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected.
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*/
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SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lfclksrc_t clock_source, softdevice_assertion_handler_t assertion_handler));
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/**@brief Disables the SoftDevice and by extension the protocol stack.
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*
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* Idempotent function to disable the SoftDevice.
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*
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* @post SoC library and protocol stack APIs are made unavailable.
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* @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest).
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* @post All peripherals used by the SoftDevice will be reset to default values.
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* @post All of RAM become available.
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* @post All interrupts are forwarded to the application.
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* @post LFCLK source chosen in ::sd_softdevice_enable will be left running.
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*
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* @retval ::NRF_SUCCESS
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*/
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SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void));
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/**@brief Check if the SoftDevice is enabled.
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*
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* @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0.
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*
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* @retval ::NRF_SUCCESS
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*/
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SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled));
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/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice
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*
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* This function is only intended to be called when a bootloader is enabled.
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*
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* @param[in] address The base address of the interrupt vector table for forwarded interrupts.
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* @retval ::NRF_SUCCESS
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*/
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SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address));
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/** @} */
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#endif // NRF_SDM_H__
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/**
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@}
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*/
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